Texas Instruments DS90UB940TNKDRQ1
- Part No.:
- DS90UB940TNKDRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 64-WFQFN Exposed Pad
- Datasheet:
-
DS90UB940TNKDRQ1.pdf
- Description:
- IC SER/DESER 25-170 MHZ FPD 64WQ
- Quantity:
- Payment:

- Shipping:

Inventory:1,998
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Product details
Overview
DS90UB940TNKDRQ1 from Texas Instruments is an AEC-Q100 Grade 2 automotive FPD-Link III deserializer that converts 1- or 2-lane FPD-Link III serial streams into MIPI CSI-2 output, supporting up to 1080p60 at 24-bit color depth with pixel clock up to 170 MHz. It operates over coaxial or STP cables, features adaptive equalization (–15.3 dB @ 1.7 GHz), and integrates I²C/SPI control and 7.1-channel I²S audio for infotainment display interfaces.
For engineers reviewing the DS90UB940TNKDRQ1 datasheet, DS90UB940TNKDRQ1 pinout, DS90UB940TNKDRQ1 application, or DS90UB940TNKDRQ1 equivalent, key selection criteria include FPD-Link III lane count support, CSI-2 lane configuration (2/4-lane), adaptive equalization range, AEC-Q100 Grade 2 qualification, and integrated I²S audio capability for automotive display systems.
Technical Context
The DS90UB940TNKDRQ1 implements a dual-lane FPD-Link III receiver with automatic deskew and clock alignment-no training patterns required-and a MIPI D-PHY v1.2-compliant CSI-2 transmitter supporting RGB888/YUV422/RAW12 formats. Its adaptive equalizer dynamically compensates for cable loss and aging across temperature, while internal PLLs recover embedded clock from forward-channel data.
Control is implemented via dual 1-Mbps Fast Mode Plus I²C (master/slave) and 3.3-Mbps SPI interfaces; four high-speed GPIOs operate up to 2 Mbps. The device supports dual CSI-2 ports (CSI0/CSI1), each configurable for 2- or 4-lane operation at up to 1.3 Gbps per lane, with programmable virtual channel IDs for multi-sensor routing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Interface | 1- or 2-lane FPD-Link III with embedded clock recovery and automatic deskew |
| Output Interface | MIPI CSI-2 v1.2 compliant; dual ports (CSI0/CSI1), 2- or 4-lane selectable per port, up to 1.3 Gbps/lane |
| Max Pixel Clock | 170 MHz - enables WUXGA (1920×1200) and 1080p60 video with 24-bit color |
| Equalization Range | –15.3 dB insertion loss compensation at 1.7 GHz - supports long coaxial/STP runs in automotive environments |
| Operating Temp | –40°C to +105°C ambient - AEC-Q100 Grade 2 qualified for under-hood and display module use |
| I²C Speed | 1 Mbps Fast Mode Plus - enables robust system-level control without external level shifters |
| Audio Support | 7.1-channel I²S with 4 data lines - delivers multichannel audio alongside video over same interconnect |
Pinout & Package
DS90UB940TNKDRQ1 is housed in a 64-pin WQFN package (9.0 mm × 9.0 mm) with wettable flanks, optimized for automotive PCB assembly and thermal performance. Pin functions are defined per TI SNLS479B Rev B datasheet, with strict guidance on unused pin handling (No Connect, no external pullups/pulldowns).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CSI0_CLK+/– | CSI-2 Port 0 differential clock output | Drives MIPI D-PHY clock lane for first CSI-2 port; requires AC coupling and 100-Ω differential termination |
| CSI0_D0+ to D3+ | CSI-2 Port 0 differential data outputs | Configurable 2- or 4-lane data lanes; each pair supports up to 1.3 Gbps for high-bandwidth sensor data |
| RIN0+/–, RIN1+/– | FPD-Link III differential receive inputs | Accepts serialized video/control from DS90UH949-Q1 or similar; supports AC-coupled coax/STP with adaptive equalization |
| I2C_SDA/SCL | Fast Mode Plus I²C bidirectional interface | Enables system-level configuration and status monitoring at 1 Mbps; open-drain with 2.2–4.7 kΩ pullup to VDDIO |
| PDB | Inverted power-down control input | Active-HIGH enable; internal 3 µA pulldown ensures safe default power-down until host asserts valid supply and logic HIGH |
| LOCK | PLL lock status indicator | Open-drain output signals stable CSI-2 clock generation - used for system boot validation and fault detection |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive Receive Equalization | Compensates –15.3 dB loss at 1.7 GHz with automatic temperature/cable aging tracking - eliminates manual tuning for production variants |
| Dual CSI-2 Ports | Independent CSI0 and CSI1 ports, each configurable for 2- or 4-lane operation - enables dual-display or dual-camera routing without external multiplexing |
| Integrated 7.1 I²S Audio | Four I²S data lines support full 7.1 surround audio transport alongside video - reduces interconnect count vs. separate audio ICs |
| AEC-Q100 Grade 2 | Qualified from –40°C to +105°C ambient - meets automotive infotainment thermal requirements for central displays and clusters |
| No-Training Deskew | Automatic skew correction across FPD-Link III lanes without training sequences - simplifies startup timing and improves reliability in vibration-prone environments |
Applications
| Central Information Display | Rear Seat Entertainment |
|---|---|
Use Scenario: High-resolution video feed from rear camera or media source to front-panel LCD in vehicle center stack. IC Role / Device Role / Timing Role: Deserializes FPD-Link III video from camera module or media processor and formats as MIPI CSI-2 for SoC image processing pipeline. Use Value: Enables 1080p60 transmission over single coaxial cable with embedded control and audio, reducing harness weight and EMI vs. parallel RGB. |
Use Scenario: Dual-screen video distribution in SUV or minivan, where one DS90UB940TNKDRQ1 drives front passenger display and another drives rear-seat screen. IC Role / Device Role / Timing Role: Acts as FPD-Link III-to-CSI-2 bridge for independent video streams, leveraging dual CSI-2 ports for simultaneous output. Use Value: Eliminates need for two discrete deserializers by supporting two independent CSI-2 outputs - lowers BOM cost and board space. |
| Digital Instrument Cluster | ADAS Camera Interface |
Use Scenario: Real-time rendering of speed, navigation, and ADAS alerts on TFT cluster using graphics processor output. IC Role / Device Role / Timing Role: Receives graphics-processor-generated FPD-Link III stream and delivers low-latency CSI-2 video to cluster MCU's image input interface. Use Value: Supports WUXGA resolution at 170 MHz pixel clock - ensures crisp, flicker-free rendering of vector-based UI elements. |
Use Scenario: Front-facing camera video path feeding raw image data to vision processor for lane detection and object recognition. IC Role / Device Role / Timing Role: Deserializes RAW12 sensor data from DS90UH949-Q1 serializer and presents it via CSI-2 to vision SoC with precise timing alignment. Use Value: Adaptive equalization maintains signal integrity over 10+ meter STP runs - critical for maintaining SNR in high-speed vision processing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III deserialization applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UB947RTVRQ1 | Single-lane FPD-Link III input only; no dual-port CSI-2 - supports only one CSI-2 output port | Suitable for single-display systems without dual-camera or dual-display routing needs | Select when cost-sensitive single-display architecture eliminates need for dual CSI-2 ports or 2-lane FPD-Link III support |
| DS90UB954TRGCRQ1 | Supports up to 4-lane FPD-Link III input and 4-lane CSI-2 output; higher bandwidth (2.5 Gbps/lane); adds HDCP 2.2 | Targeted at premium digital clusters requiring 4K resolution and content protection | Choose for next-gen clusters needing >1080p resolution, HDCP, or higher lane count - not pin-compatible with DS90UB940TNKDRQ1 |
Compared with DS90UB947RTVRQ1 and DS90UB954TRGCRQ1, the DS90UB940TNKDRQ1 uniquely balances dual CSI-2 port flexibility, 2-lane FPD-Link III support, and AEC-Q100 Grade 2 qualification at mid-tier bandwidth - making it optimal for mainstream 1080p automotive displays requiring dual-output routing without HDCP overhead.
Availability
DS90UB940TNKDRQ1 is available at Aetrix Electronics and suitable for automotive infotainment, digital instrument clusters, and rear seat entertainment systems requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.
Supply support for DS90UB940TNKDRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader focused on analog, embedded processing, and connectivity technologies, with deep expertise in automotive-grade signal chain and interface solutions.
The DS90UB940TNKDRQ1 belongs to TI's FPD-Link III automotive serializer/deserializer product line, designed specifically to replace bulky parallel video interfaces in automotive displays with robust, EMI-resistant, high-speed serial links.
FAQ
What is the maximum supported video resolution and frame rate for DS90UB940TNKDRQ1?
The DS90UB940TNKDRQ1 supports up to 1080p60 resolution with 24-bit color depth, enabled by its 170 MHz pixel clock capability. In dual-lane FPD-Link III mode, it handles WUXGA (1920×1200) at 60 Hz. Backward-compatible single-lane mode supports up to 720p60. These limits are defined in the TI SNLS479B datasheet Section 1 and confirmed by AC timing specifications.
Does DS90UB940TNKDRQ1 support both coaxial and shielded twisted-pair (STP) cable types?
Yes, DS90UB940TNKDRQ1 is designed to operate over both 50-Ω single-ended coaxial and 100-Ω differential STP cables. Its adaptive equalizer automatically compensates for channel loss up to –15.3 dB at 1.7 GHz, ensuring robust link integrity across cable types and lengths typical in automotive applications.
How many MIPI CSI-2 lanes can DS90UB940TNKDRQ1 configure per port, and is dual-port operation simultaneous?
DS90UB940TNKDRQ1 provides two independent MIPI CSI-2 ports (CSI0 and CSI1), each configurable for either 2-lane or 4-lane operation. Both ports operate simultaneously - enabling concurrent video streams to separate processors or displays without time-division multiplexing.
What audio interfaces does DS90UB940TNKDRQ1 integrate, and how many channels are supported?
DS90UB940TNKDRQ1 integrates a full 7.1-channel I²S audio interface with four data lines (I2S_DA, I2S_DB, I2S_DC, I2S_DD), supporting eight discrete audio channels. Audio is transported alongside video over the same FPD-Link III link, eliminating need for separate audio interconnects in automotive infotainment systems.
Is DS90UB940TNKDRQ1 pin-compatible with other devices in the DS90UB9xx-Q1 family?
No, DS90UB940TNKDRQ1 is not pin-compatible with other DS90UB9xx-Q1 devices. Its 64-pin WQFN footprint and specific pin assignments (e.g., dual CSI-2 ports, dedicated I²S pins, dual FPD-Link III receivers) differ from variants like DS90UB947RTVRQ1 (40-pin) or DS90UB954TRGCRQ1 (64-pin but different pinout). Board redesign is required for substitution.
DS90UB940TNKDRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- 3.36Gbps
- Input Type:
- FPD-Link III, LVDS
- Output Type:
- CSI-2, MIPI
- Number of Inputs:
- 2
- Number of Outputs:
- 4
- Voltage - Supply:
- 1.71V ~ 1.89V, 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-WQFN (9x9)
DS90UB940TNKDRQ1 FAQ
1.How can I place an order for DS90UB940TNKDRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UB940TNKDRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UB940TNKDRQ1 reliable?
The price and inventory of DS90UB940TNKDRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UB940TNKDRQ1 is usually 5 days.
3.What payment methods are accepted for DS90UB940TNKDRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UB940TNKDRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UB940TNKDRQ1?
DS90UB940TNKDRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UB940TNKDRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UB940TNKDRQ1?
For technical support, including DS90UB940TNKDRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UB940TNKDRQ1 requirements.
6.How does Aetrix verify that DS90UB940TNKDRQ1 is sourced from the original manufacturer or authorized distributors?
All DS90UB940TNKDRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UB940TNKDRQ1 meets industry standards.
7.What is the process for return or replacement of DS90UB940TNKDRQ1?
All DS90UB940TNKDRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with DS90UB940TNKDRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UB940TNKDRQ1 part is unused and in its original packaging.
Return procedure for DS90UB940TNKDRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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