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Texas Instruments DS90UB948TNKDRQ1
- Part No.:
- DS90UB948TNKDRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 64-WFQFN Exposed Pad
- Datasheet:
-
DS90UB948TNKDRQ1.pdf
- Description:
- IC SER/DESER 25-170 MHZ FPD 64WQ
- Quantity:
- Payment:
- Shipping:
Inventory:3,131
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Product details
Overview
DS90UB948TNKDRQ1 from Texas Instruments is an AEC-Q100 Grade 2 automotive FPD-Link III deserializer that converts 1- or 2-lane serialized video streams into dual-channel OpenLDI (LVDS) output, supporting up to 2048×1080@24-bit color at 192 MHz pixel clock. It integrates adaptive equalization for up to –15.5 dB insertion loss compensation, four high-speed GPIOs, and functional safety documentation for ISO 26262 system integration in digital instrument clusters.
For engineers reviewing the DS90UB948TNKDRQ1 datasheet, DS90UB948TNKDRQ1 pinout, DS90UB948TNKDRQ1 application, or DS90UB948TNKDRQ1 equivalent, key selection criteria include FPD-Link III lane count support, LVDS channel configuration (single/dual), pixel clock range (up to 192 MHz), adaptive equalization capability, and automotive-grade thermal operation (–40°C to +105°C).
Technical Context
The DS90UB948TNKDRQ1 implements a dual-lane FPD-Link III receiver with automatic deskew and clock alignment-no training patterns required-and translates recovered data into two independent OpenLDI links (8 LVDS data lanes + clock). Its adaptive equalizer dynamically compensates for cable aging and temperature drift across coaxial or STP interconnects.
It supports configurable RGB formats (18-bit or 24-bit), includes SPI (≤3.3 Mbps) and I²C (≤1 Mbps Fast Mode Plus) control interfaces, and delivers image enhancement features including white balance and dithering. The device operates with multiple supply domains: VDD12_LVDS, VDDP12_CH0/CH1, VDD33_A/B, and VDDIO-all specified for automotive ambient conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Pixel Clock | 192 MHz - enables full 2K (2048×1080) resolution with 24-bit RGB at 60 Hz frame rate |
| FPD-Link III Lanes | 1 or 2 lanes - determines bandwidth scalability and cable count in infotainment video links |
| LVDS Output Channels | Single or dual - single supports ≤96 MHz PCLK (WXGA/720p); dual supports ≤192 MHz PCLK (2K) |
| Equalization Range | –15.5 dB @ 1.48 GHz - compensates for long coaxial or STP cable losses without manual tuning |
| Operating Temp | –40°C to +105°C - meets AEC-Q100 Grade 2 requirements for under-hood and dashboard mounting |
| I²C Speed | 1 Mbps Fast Mode Plus - allows high-speed register access and real-time display timing adjustments |
| SPI Speed | 3.3 Mbps - supports fast firmware updates and configuration loading over control bus |
Pinout & Package
DS90UB948TNKDRQ1 is housed in a 64-pin WQFN package (9.00 mm × 9.00 mm) with wettable flanks, optimized for automotive PCB assembly and thermal dissipation in space-constrained displays.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK1±, CLK2± | LVDS clock outputs | Dual differential clock pairs for synchronized timing of two OpenLDI channels; require 100-Ω external termination |
| D0±–D7± | LVDS data outputs | Eight differential data lanes (4 per channel); support 18-/24-bit RGB mapping; each pair requires 100-Ω termination |
| RIN0±, RIN1± | FPD-Link III receive inputs | AC-coupled differential inputs for 1- or 2-lane serialized video/control; tolerate ±15.5 dB channel loss |
| I2C_SDA / I2C_SCL | I²C bidirectional control | Open-drain interface with external pullup; supports 1-Mbps Fast Mode Plus for display timing register writes |
| PICO / POCI / CS | SPI control interface | Programmable peripheral interface pins enabling register access and configuration without I²C bus contention |
Key Features
| Feature | Design Value |
|---|---|
| Automatic deskew | Eliminates need for training sequences-enables plug-and-play interoperability with DS90UB949A/949/947-Q1 serializers |
| Adaptive equalization | Real-time compensation for temperature drift and cable aging ensures stable link margin over vehicle lifetime |
| Functional safety support | ISO 26262 documentation package available-including FMEDA, safety manual, and diagnostic coverage analysis |
| Image enhancement | On-chip white balance and dithering reduce visual artifacts on legacy LVDS panels without external processing |
| High-speed GPIOs | Four 2-Mbps configurable GPIOs enable panel power sequencing, backlight control, or hot-plug detection |
Applications
| Central Information Display | Rear Seat Entertainment |
|---|---|
Use Scenario: High-resolution multimedia navigation and vehicle telemetry rendered on a 10.25″–12.3″ TFT-LCD dashboard display. IC Role / Device Role / Timing Role: Deserializes FPD-Link III video from GPU or SoC and drives dual-channel LVDS interface to display timing controller. Use Value: Enables 2K resolution with minimal EMI via differential signaling and eliminates separate clock/data routing complexity. | Use Scenario: Dual-screen rear-seat video playback using HDMI source converted to LVDS-compatible signals. IC Role / Device Role / Timing Role: Bridges HDMI-enabled media processor to legacy LVDS-based LCD modules in passenger cabin. Use Value: Reduces interconnect weight by consolidating video, audio (7.1 I²S), and control onto two differential pairs. |
| Digital Instrument Cluster | Head-Up Display (HUD) Interface |
Use Scenario: Real-time rendering of speed, ADAS alerts, and navigation overlays on a 7″–10″ TFT cluster with critical latency constraints. IC Role / Device Role / Timing Role: Receives time-critical video stream over FPD-Link III and delivers deterministic LVDS output with sub-frame deskew. Use Value: Guarantees pixel-perfect synchronization between graphics engine and display driver under varying thermal conditions. | Use Scenario: Driving HUD projection unit requiring low-jitter, noise-immune video transmission from central domain controller. IC Role / Device Role / Timing Role: Converts serialized video to LVDS while suppressing EMI through scrambling and CML-to-LVDS signal conditioning. Use Value: Maintains >300 mV eye height at 192 MHz to ensure robust timing margin for optical combiner alignment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UB940TRGCRQ1 | Single-lane only; max 96 MHz PCLK; no dual LVDS channel support | Limited to WXGA/720p; lacks adaptive equalization and image enhancement | Select when cost-sensitive entry-level cluster or small-display use case does not require 2K resolution |
| MAX96706GTJ+T | GMSL2 deserializer; different protocol stack, 1.5 Gbps per lane, integrated diagnostics | Requires GMSL2 serializer (e.g., MAX96705); not FPD-Link III compatible | Choose for systems already standardized on Maxim GMSL2 architecture or needing built-in link health monitoring |
Compared with DS90UB948TNKDRQ1, DS90UB940TRGCRQ1 offers lower bandwidth and reduced feature set for simpler displays, while MAX96706GTJ+T provides higher lane efficiency and embedded diagnostics-but mandates protocol-specific ecosystem alignment rather than drop-in replacement.
Availability
DS90UB948TNKDRQ1 is available at Aetrix Electronics and suitable for automotive infotainment, digital instrument clusters, and rear seat entertainment systems requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.
Supply support for DS90UB948TNKDRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for automotive, industrial, and personal electronics markets.
The DS90UB948TNKDRQ1 belongs to TI's FPD-Link III SerDes portfolio, engineered specifically for high-reliability automotive video transport-bridging modern GPUs to legacy LVDS displays while meeting ASIL-B functional safety requirements.
FAQ
What is the maximum supported resolution and color depth for DS90UB948TNKDRQ1?
The DS90UB948TNKDRQ1 supports up to 2048×1080 (2K) resolution with 24-bit RGB color depth at a 192 MHz pixel clock. This capability is enabled only in dual-channel LVDS mode. In single-channel mode, it supports up to 96 MHz PCLK-sufficient for WXGA or 720p displays. Both configurations maintain full backward compatibility with existing OpenLDI timing standards.
Does DS90UB948TNKDRQ1 require external training patterns for deskew calibration?
No, DS90UB948TNKDRQ1 performs automatic deskew without training patterns. It continuously monitors phase alignment between FPD-Link III lanes and applies real-time correction-ensuring robust skew tolerance across PCB trace mismatches, cable length variations, and connector imbalances. This eliminates startup delay and simplifies system initialization in automotive environments.
How does DS90UB948TNKDRQ1 handle cable degradation over vehicle lifetime?
DS90UB948TNKDRQ1 incorporates adaptive receive equalization that automatically adjusts gain and frequency response to compensate for cable aging and temperature-induced insertion loss changes. It maintains link integrity across –15.5 dB loss at 1.48 GHz and –9 dB at 1.68 GHz, ensuring consistent video fidelity throughout the 15-year automotive service life without field recalibration.
Can DS90UB948TNKDRQ1 interface directly with HDMI sources?
DS90UB948TNKDRQ1 does not accept HDMI signals directly. It requires an upstream FPD-Link III serializer such as DS90UB949A-Q1 or DS90UB947-Q1 to convert HDMI video into FPD-Link III format. The DS90UB948TNKDRQ1 then deserializes that stream into OpenLDI (LVDS) for display driver input-forming a complete bridge solution from HDMI-enabled GPUs to LVDS panels.
What functional safety documentation is provided for DS90UB948TNKDRQ1?
Texas Instruments provides a dedicated ISO 26262 functional safety package for DS90UB948TNKDRQ1, including FMEDA reports, safety manual, diagnostic coverage analysis, and hardware safety assessment summary. These documents support ASIL-B system-level development but do not constitute full ASIL-B certification of the device itself-system integrators must perform their own safety analysis per application context.
DS90UB948TNKDRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- 3.36Gbps
- Input Type:
- FPD-Link III, LVDS
- Output Type:
- LVDS
- Number of Inputs:
- 2
- Number of Outputs:
- 8
- Voltage - Supply:
- 1.71V ~ 1.89V, 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-WQFN (9x9)
DS90UB948TNKDRQ1 FAQ
1.How can I place an order for DS90UB948TNKDRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UB948TNKDRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UB948TNKDRQ1 reliable?
The price and inventory of DS90UB948TNKDRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UB948TNKDRQ1 is usually 5 days.
3.What payment methods are accepted for DS90UB948TNKDRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UB948TNKDRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UB948TNKDRQ1?
DS90UB948TNKDRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UB948TNKDRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UB948TNKDRQ1?
For technical support, including DS90UB948TNKDRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UB948TNKDRQ1 requirements.
6.How does Aetrix verify that DS90UB948TNKDRQ1 is sourced from the original manufacturer or authorized distributors?
All DS90UB948TNKDRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UB948TNKDRQ1 meets industry standards.
7.What is the process for return or replacement of DS90UB948TNKDRQ1?
All DS90UB948TNKDRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with DS90UB948TNKDRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UB948TNKDRQ1 part is unused and in its original packaging.
Return procedure for DS90UB948TNKDRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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