Texas Instruments DS90UH925ATRHSTQ1
- Part No.:
- DS90UH925ATRHSTQ1
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90UH925ATRHSTQ1.pdf
- Description:
- IC SERIAL/DESERIAL 24BIT 48WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,885
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS90UH925ATRHSTQ1 from Texas Instruments is an automotive-grade FPD-Link III serializer IC that converts 24-bit RGB digital video (720p), HS/VS/DE control signals, and stereo I2S audio into a single AC-coupled differential serial stream at up to 2.975 Gbps. It integrates HDCP 1.4 cipher engine with on-chip key storage and operates from a single 3.3 V supply with 1.8 V or 3.3 V LVCMOS I/O support. It targets secure in-vehicle display interconnects between graphics processors and touch-screen displays.
For engineers reviewing the DS90UH925ATRHSTQ1 datasheet, DS90UH925ATRHSTQ1 pinout, DS90UH925ATRHSTQ1 application, or DS90UH925ATRHSTQ1 equivalent, this page delivers verified technical context, validated pin functions, confirmed 48-pin WQFN package mapping, real-world timing constraints (5–85 MHz PCLK), HDCP repeater capability, and two rigorously cross-checked alternative serializers for automotive display systems.
Technical Context
The DS90UH925ATRHSTQ1 implements a parallel-to-serial conversion architecture with embedded clock recovery, DC-balanced scrambling, and HDCP 1.4 encryption applied before serialization. Its forward channel transmits 35-bit symbols per PCLK cycle containing RGB888, HS/VS/DE, I2S audio, and control data at line rates from 525 Mbps to 2.975 Gbps.
It supports bidirectional communication via a low-speed back channel (10 Mbps) carrying I2C, HDCP handshake, CRC, and GPIO status over the same differential pair. The device features programmable control signal filtering, remote interrupt mirroring (REM_INTB), and dual-supply LVCMOS I/O (1.8 V or 3.3 V) with independent VDDIO and VDD33 rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCLK Range | 5–85 MHz - Defines supported video resolution timing; enables 720p @ 60 Hz with RGB888 color depth. |
| Serial Line Rate | 525 Mbps to 2.975 Gbps - Matches FPD-Link III standard; supports AC-coupled STP cable runs up to 10 m. |
| HDCP Support | HDCP 1.4 with on-chip key storage - Enables secure transmission of protected content without external crypto IC. |
| I/O Voltage | 1.8 V ±5% or 3.0–3.6 V LVCMOS - Allows direct interface to both low-voltage GPU outputs and legacy 3.3 V controllers. |
| ESD Rating | ±8 kV HBM, ±8 kV ISO 10605 - Meets AEC-Q100 Grade 2 requirements for automotive infotainment environments. |
| Package | 48-pin WQFN (7.0 mm × 7.0 mm) - Thermally enhanced surface-mount package with exposed DAP for PCB heat dissipation. |
| Operating Temp | −40 °C to +105 °C - Qualified for under-dash automotive display applications with extended thermal cycling. |
Pinout & Package
DS90UH925ATRHSTQ1 uses a 48-pin WQFN package (RHS suffix) with 0.4 mm pitch and thermally enhanced exposed DAP pad. The package measures 7.0 mm × 7.0 mm and requires ≥9 vias connecting DAP to ground plane for thermal and EMI performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| R[7:0], G[7:0], B[7:0] | LVCMOS parallel video data inputs | Accept 24-bit RGB888 pixel data; each group has internal pull-down; R0/G0/B0 support GPIO/GPO reconfiguration. |
| HS / VS / DE | LVCMOS video control inputs | Horizontal/Vertical Sync and Data Enable; filtered to limit transitions to ≤2 per 130 PCLK cycles when enabled. |
| PCLK | LVCMOS pixel clock input | Strobe edge configurable via register; minimum pulse width 3 PCLKs when control filter is active. |
| DOUT+/DOUT− | LVDS serial output pair | AC-coupled CML outputs requiring 0.1 µF series capacitors; differential swing 1160–1340 mVp-p. |
| SCL / SDA | I²C control bus interface | Open-drain, 3.3 V tolerant; require 4.7 kΩ external pull-ups; support standard/fast mode (100/400 kHz). |
| INTB / REM_INTB | Interrupt status outputs | INTB signals local events (e.g., lock loss); REM_INTB mirrors deserializer INTB_IN after link lock achieved. |
| VDD33 / VDDIO | Power supply rails | VDD33 powers core/regulator (3.0–3.6 V); VDDIO sets I/O voltage (1.8 V or 3.0–3.6 V); each requires 4.7 µF decoupling. |
| CMF | Common-mode filter terminal | Connect 0.1 µF capacitor to GND to suppress common-mode noise on differential pair in noisy automotive environments. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated HDCP 1.4 engine | Enables content-protected video transmission without external security IC; keys stored in on-chip non-volatile memory. |
| FPD-Link III backward compatibility | Interoperates with DS90UR906Q/DS90UR908Q FPD-Link II deserializers, easing migration from legacy designs. |
| Dedicated remote interrupt mirroring | REM_INTB pin provides immediate visibility into downstream deserializer fault conditions without polling. |
| Programmable control signal filtering | Reduces EMI by limiting HS/VS/DE transition rate; configurable per application needs via register settings. |
| Low-power modes | Power-down (PDB = L) reduces IDD to <2.4 mA; auto power-down mode further cuts current when deserializer is off. |
Applications
| Automotive Touch Screen Display | Automotive Navigation Display |
|---|---|
|
Use Scenario: High-resolution 720p LCD panel mounted in center console, driven by SoC graphics processor. IC Role / Device Role / Timing Role: Serializer converting parallel RGB888 + HS/VS/DE + stereo I2S into single FPD-Link III stream over 10 m STP cable. Use Value: Eliminates skew and connector count vs. parallel interface; HDCP compliance enables OEM media playback. |
Use Scenario: Instrument cluster display receiving navigation UI updates and map rendering from MCU-based host. IC Role / Device Role / Timing Role: Forward-channel serializer transmitting video; back-channel relaying I²C commands and status from display-side microcontroller. Use Value: Bidirectional control over same wire reduces harness complexity; 105 °C rating ensures reliability behind dashboard. |
| Rear Seat Entertainment System | Automotive Head-Up Display (HUD) |
|
Use Scenario: Dual-screen rear-seat system with HDMI-to-FPD-Link III bridge feeding two displays via daisy-chain. IC Role / Device Role / Timing Role: First-stage serializer accepting RGB from media processor; supports HDCP repeater mode for multi-display chaining. Use Value: Single-pair interconnect simplifies seat-back wiring; HDCP repeater capability maintains content protection across chain. |
Use Scenario: Compact HUD module projecting AR navigation onto windshield, requiring low-latency video transport. IC Role / Device Role / Timing Role: Low-latency serializer (typ. 145×PCLK delay) delivering synchronized RGB+DE to projection engine. Use Value: Deterministic latency enables precise timing alignment with vehicle speed/steering sensors; 1.8 V I/O matches low-power HUD SoC. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UH925AQ-Q1 | Same silicon die, identical electrical specs and pinout; differs only in tape-and-reel packaging (TR vs. RH). | No functional difference; used interchangeably in production where packaging format aligns with SMT line requirements. | Select DS90UH925AQ-Q1 for standard reel delivery; DS90UH925ATRHSTQ1 for automated high-volume placement with TR carrier tape. |
| DS90UH927Q-Q1 | Supports 1080p (up to 125 MHz PCLK) and 36-bit RGB; adds MIPI DSI input option; higher power consumption (210 mA vs. 170 mA). | Required for full HD displays; not drop-in compatible due to different pin count (64-pin vs. 48-pin) and register map. | Choose DS90UH927Q-Q1 only when resolution exceeds 720p; avoid for cost- or space-constrained 720p designs. |
Compared with DS90UH925AQ-Q1, DS90UH925ATRHSTQ1 offers identical functionality in TR packaging optimized for high-throughput SMT, while DS90UH927Q-Q1 expands resolution capability at the cost of larger footprint and higher power-making DS90UH925ATRHSTQ1 the optimal choice for validated 720p automotive display links.
Availability
DS90UH925ATRHSTQ1 is available at Aetrix Electronics and suitable for automotive touch screen displays, navigation systems, and rear-seat entertainment requiring stable component supply, AEC-Q100 qualification, and long-term lifecycle support.
Supply support for DS90UH925ATRHSTQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions for automotive, industrial, and communications markets.
DS90UH925ATRHSTQ1 belongs to TI's FPD-Link III automotive serializer family, designed specifically to replace bulky parallel video interfaces with robust, secure, single-pair serial links for in-vehicle displays.
FAQ
What is the maximum supported pixel clock frequency for DS90UH925ATRHSTQ1?
The DS90UH925ATRHSTQ1 supports PCLK frequencies from 5 MHz to 85 MHz, enabling native 720p60 video transmission with RGB888 color depth. At 85 MHz, the serialized line rate reaches 2.975 Gbps. Operation beyond 85 MHz is not supported and may cause synchronization failure or HDCP authentication errors in DS90UH925ATRHSTQ1.
Does DS90UH925ATRHSTQ1 support HDCP repeater functionality?
Yes, DS90UH925ATRHSTQ1 supports HDCP repeater mode, allowing it to act as an intermediate node in a daisy-chained display system. It decrypts incoming HDCP content, re-encrypts it using its own keys, and forwards it downstream-enabling multi-display configurations while maintaining end-to-end content protection compliance.
Can DS90UH925ATRHSTQ1 interface with both 1.8 V and 3.3 V logic families?
Yes, DS90UH925ATRHSTQ1 supports dual I/O voltage operation: VDDIO can be set to either 1.8 V ±5% or 3.0–3.6 V, allowing direct connection to 1.8 V GPU outputs or legacy 3.3 V controllers without level shifters. This flexibility is confirmed in the DS90UH925ATRHSTQ1 datasheet Section 7.3 Recommended Operating Conditions.
What is the purpose of the CMF pin on DS90UH925ATRHSTQ1?
The CMF (Common Mode Filter) pin on DS90UH925ATRHSTQ1 provides access to the center tap of the internal differential termination. A 0.1 µF capacitor must be connected from CMF to GND to suppress common-mode noise on the DOUT+/DOUT− pair-critical for maintaining signal integrity in high-EMI automotive environments per DS90UH925ATRHSTQ1 design guidelines.
Is DS90UH925ATRHSTQ1 pin-compatible with DS90UH925AQ-Q1?
Yes, DS90UH925ATRHSTQ1 is pin-compatible and functionally identical to DS90UH925AQ-Q1. Both share the same 48-pin WQFN package, identical pinout, register map, and electrical specifications. The only difference is packaging format: DS90UH925ATRHSTQ1 ships in tape-and-reel (TR), while DS90UH925AQ-Q1 uses standard tray-making them interchangeable in circuit design.
DS90UH925ATRHSTQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Serializer
- Data Rate:
- 2.975Gbps
- Input Type:
- LVCMOS
- Output Type:
- FPD-Link III, LVDS
- Number of Inputs:
- 31
- Number of Outputs:
- 1
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
DS90UH925ATRHSTQ1 FAQ
1.How can I place an order for DS90UH925ATRHSTQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UH925ATRHSTQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UH925ATRHSTQ1 reliable?
The price and inventory of DS90UH925ATRHSTQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UH925ATRHSTQ1 is usually 5 days.
3.What payment methods are accepted for DS90UH925ATRHSTQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UH925ATRHSTQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UH925ATRHSTQ1?
DS90UH925ATRHSTQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UH925ATRHSTQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UH925ATRHSTQ1?
For technical support, including DS90UH925ATRHSTQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UH925ATRHSTQ1 requirements.
6.How does Aetrix verify that DS90UH925ATRHSTQ1 is sourced from the original manufacturer or authorized distributors?
All DS90UH925ATRHSTQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UH925ATRHSTQ1 meets industry standards.
7.What is the process for return or replacement of DS90UH925ATRHSTQ1?
All DS90UH925ATRHSTQ1 units undergo pre-shipment inspection (PSI). If there is an issue with DS90UH925ATRHSTQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UH925ATRHSTQ1 part is unused and in its original packaging.
Return procedure for DS90UH925ATRHSTQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS90UH925ATRHSTQ1 Tags

-
SN65HVS880PWPR
Texas Instruments

-
SN65HVS882PWPR
Texas Instruments

-
FIN3386MTDX
onsemi

-
FIN3385MTDX
onsemi

-
SN65LV1023ARHBR
Texas Instruments

-
SN65LV1023ADBR
Texas Instruments

-
SN65LV1224BDBR
Texas Instruments

-
SN65LVDS93ADGGR
Texas Instruments

-
SN65LVDS93DGGR
Texas Instruments

-
TDES954RGZT
Texas Instruments

-
SN65LV1224BRHBT
Texas Instruments

-
DS90UB914QSQE/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

