My Inquiry
My Account
Texas Instruments DS90UH925QSQE/NOPB
- Part No.:
- DS90UH925QSQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90UH925QSQE/NOPB.pdf
- Description:
- IC SERIAL/DESERIAL 24BIT 48WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,547
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS90UH925QSQE/NOPB from Texas Instruments is an automotive-grade FPD-Link III serializer IC that converts 24-bit RGB888 video + HS/VS/DE control signals and stereo I2S audio into a single AC-coupled differential serial stream at up to 2.975 Gbps. It integrates HDCP 1.3 cipher engine with on-chip key storage, supports 5–85 MHz PCLK, and operates from 1.8 V or 3.3 V LVCMOS I/O supply. It targets secure in-vehicle display links for navigation and rear-seat entertainment systems.
For engineers reviewing the DS90UH925QSQE/NOPB datasheet, DS90UH925QSQE/NOPB pinout, DS90UH925QSQE/NOPB application, or DS90UH925QSQE/NOPB equivalent, this page delivers verified technical context, exact pin functions, real-world timing constraints (e.g., tDIS ≤ 2.0 ns setup), HDCP repeater capability, and validated alternatives for automotive display interface design.
Technical Context
The DS90UH925QSQE/NOPB implements a parallel-to-serial conversion architecture with embedded clock recovery, DC-balanced scrambling, and integrated HDCP 1.3 encryption. Its forward channel transmits 35-bit symbols per PCLK cycle containing RGB data, sync signals, and encrypted I2S audio - all optimized for AC-coupled STP cabling up to 10 meters.
It features bidirectional control via I2C-compatible SCL/SDA over the same FPD-Link III physical layer, supports backward compatibility with FPD-Link II deserializers (DS90UR906Q/DS90UR908Q), and includes programmable GPIOs (R0/R1/G0/G1/B0/B1/I2S_DA/WC/CLK) configurable via MODE_SEL or registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCLK Range | 5–85 MHz - defines minimum 720p@60Hz support and maximum serialized throughput of 2.975 Gbps |
| Forward Channel Rate | Up to 2.975 Gbps - enables full 24-bit RGB + audio + control over one differential pair |
| HDCP Support | HDCP 1.3 with on-chip key storage - provides content protection without external crypto IC or firmware management |
| I/O Voltage | 1.8 V ±5% or 3.0–3.6 V - allows direct interfacing with both low-voltage graphics processors and legacy 3.3 V controllers |
| ESD Rating | ±8 kV HBM, ±8 kV ISO 10605 - meets AEC-Q100 Grade 2 requirements for automotive cabin environments |
| Power-down Current | IDDS2 ≤ 2 mA (VDD33) + IDDIOS2 ≤ 150 μA (VDDIO) - enables ultra-low standby power when PDB = L |
| Latency | tSD = 145 × T (T = 1/PCLK) - deterministic end-to-end delay critical for real-time display synchronization |
Pinout & Package
DS90UH925QSQE/NOPB uses a 48-pin WQFN package (7.0 mm × 7.0 mm) with exposed thermal pad (DAP) requiring ≥9 vias to ground plane. Pin functions are validated per TI SNLS336J Rev J datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| R[7:0] | Parallel RGB red data input | LVCOS inputs w/ internal pull-down; R0/R1 double as GPIO0/GPIO1 in 18-bit mode |
| G[7:0] | Parallel RGB green data input | LVCOS inputs w/ internal pull-down; G0/G1 double as GPIO2/GPIO3 in 18-bit mode |
| B[7:0] | Parallel RGB blue data input | LVCOS inputs w/ internal pull-down; B0/B1 double as GPO_REG4/GPO_REG5 |
| HS / VS / DE / PCLK | Video timing control inputs | LVCMOS inputs w/ pull-down; HS/VS pulse width ≥3 PCLKs when filter enabled |
| I2S_CLK / WC / DA | Stereo audio interface inputs | LVCMOS inputs w/ pull-down; configurable as GPO_REG8/7/6 via register |
| DOUT+ / DOUT- | FPD-Link III CML serial output | Differential outputs requiring 0.1 µF AC coupling; 100 Ω termination across pair |
| SCL / SDA | I2C control bus interface | Open-drain pins requiring 4.7 kΩ pull-up to VDD33; support Fast Mode (400 kHz) |
| INTB | HDCP interrupt output | Open-drain active-low signal indicating HDCP authentication status change |
| PDB | Power-down mode control | LVCMOS input; HIGH = normal operation, LOW = shutdown PLL and minimize IDD |
| VDD33 / VDDIO / GND / DAP | Power and ground terminals | VDD33 powers internal regulator (3.0–3.6 V); VDDIO sets I/O voltage (1.8 V or 3.3 V); DAP is thermal pad tied to ground |
Key Features
| Feature | Design Value |
|---|---|
| Integrated HDCP 1.3 engine | Enables secure video distribution without external encryption hardware or host CPU intervention |
| AC-coupled STP interconnect | Supports up to 10 m cable length using 100 Ω shielded twisted pair, eliminating DC bias drift issues |
| Backward compatibility | Interoperates with DS90UR906Q/DS90UR908Q FPD-Link II deserializers - reduces redesign risk during platform migration |
| Programmable GPIOs | Eight configurable pins (R0/R1/G0/G1/B0/B1/I2S_DA/WC/CLK) usable as inputs or outputs based on MODE_SEL or register settings |
| Low-power modes | Power-down state reduces total supply current to <2.2 mA while retaining register state after wake-up |
| Automotive qualification | AEC-Q100 Grade 2 (−40°C to +105°C) and >8 kV HBM ESD rating - certified for front/rear display modules |
Applications
| Automotive Navigation Display | Rear-Seat Entertainment System |
|---|---|
Use Scenario: High-resolution map rendering and turn-by-turn guidance in instrument cluster or center console display. IC Role / Device Role / Timing Role: Serializer converting GPU's parallel RGB888 + HS/VS/DE output into noise-immune FPD-Link III stream for remote LCD panel. Use Value: Eliminates skew between 24 data lines and 3 control signals; HDCP ensures OEM map data cannot be intercepted over cable. |
Use Scenario: Dual-screen video playback with synchronized stereo audio in premium vehicle backseat zones. IC Role / Device Role / Timing Role: Parallel-to-serial bridge carrying RGB video, I2S stereo audio, and bidirectional I2C control over single STP cable. Use Value: Reduces harness weight by replacing 30+ wires with one shielded pair; AC coupling prevents ground loop artifacts in multi-battery systems. |
| HDCP Repeater Node | Infotainment Head Unit Interface |
Use Scenario: Intermediate display controller relaying protected content from head unit to multiple downstream displays. IC Role / Device Role / Timing Role: HDCP-compliant repeater implementing key exchange and re-encryption between upstream and downstream FPD-Link III links. Use Value: Enables daisy-chained topology without breaking HDCP chain; supports simultaneous authentication of multiple sinks. |
Use Scenario: Graphics processor interface in automotive head unit delivering UI and media content to central display. IC Role / Device Role / Timing Role: Low-latency serializer (tSD = 145 × T) ensuring frame-synchronized delivery of 720p@60Hz video to display controller. Use Value: Deterministic latency enables precise VSYNC alignment; 1.8 V I/O support lowers power consumption vs. 3.3 V alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UH925Q-Q1 | Same silicon; Q-Q1 suffix denotes AEC-Q100 Grade 2 qualification and enhanced automotive test coverage | Identical functional spec; Q-Q1 required for production automotive programs | Select DS90UH925QSQE/NOPB for commercial evaluation; DS90UH925Q-Q1 for automotive production release |
| DS90UH927QSQE/NOPB | Supports 1080p resolution (up to 125 MHz PCLK) and adds MIPI DSI input option; no HDCP engine | Targeted at higher-resolution displays without content protection requirements | Choose DS90UH927QSQE/NOPB only if 720p is insufficient and HDCP is not mandated |
Compared with DS90UH925Q-Q1 and DS90UH927QSQE/NOPB, the DS90UH925QSQE/NOPB uniquely combines 720p capability, integrated HDCP 1.3, and commercial-grade availability - making it the optimal choice for cost-sensitive automotive display prototypes requiring content security but not 1080p bandwidth.
Availability
DS90UH925QSQE/NOPB is available at Aetrix Electronics and suitable for automotive navigation displays, rear-seat entertainment systems, and infotainment head units requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for DS90UH925QSQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive electronics, with decades of experience in high-reliability interface solutions.
The DS90UH925QSQE/NOPB belongs to TI's FPD-Link III automotive serializer family, designed specifically to replace bulky parallel video interfaces with robust, secure, single-pair serial links for in-vehicle displays.
FAQ
What video resolutions does the DS90UH925QSQE/NOPB support?
The DS90UH925QSQE/NOPB supports up to 720p resolution (1280×720) at 60 Hz, corresponding to a pixel clock range of 5–85 MHz. It serializes 24-bit RGB888 data plus HS, VS, DE, and stereo I2S audio into a single FPD-Link III stream. Higher resolutions like 1080p require DS90UH927QSQE/NOPB, which lacks HDCP but supports up to 125 MHz PCLK.
Does the DS90UH925QSQE/NOPB include HDCP functionality?
Yes, the DS90UH925QSQE/NOPB integrates a full HDCP 1.3 cipher engine with on-chip non-volatile memory for key storage. It performs real-time encryption of video and I2S audio payloads and supports HDCP repeater functionality, enabling authenticated daisy-chained display topologies without external security ICs.
What is the recommended termination for the DOUT+ and DOUT- pins of the DS90UH925QSQE/NOPB?
The DS90UH925QSQE/NOPB DOUT+ and DOUT- pins require AC coupling via 0.1 µF capacitors and a 100 Ω differential termination across the pair. The device includes internal 40–62 Ω single-ended termination resistors, so no external series resistors are needed - only the external 100 Ω load and coupling caps per TI SNLS336J layout guidelines.
Can the DS90UH925QSQE/NOPB operate with a 1.8 V I/O supply?
Yes, the DS90UH925QSQE/NOPB supports dual I/O voltage operation: VDDIO may be set to either 1.8 V ±5% or 3.0–3.6 V. This allows direct interfacing with low-voltage graphics processors while maintaining full functionality including GPIO configuration, I2C control, and HDCP interrupt signaling.
Is the DS90UH925QSQE/NOPB pin-compatible with the DS90UH925Q-Q1?
Yes, the DS90UH925QSQE/NOPB is functionally and pin-compatible with the DS90UH925Q-Q1. Both use identical 48-pin WQFN packaging, pin mapping, and electrical specifications. The Q-Q1 variant adds AEC-Q100 Grade 2 qualification and extended automotive test coverage, while the SQE/NOPB is the commercial-grade version intended for prototyping and non-automotive applications.
DS90UH925QSQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Serializer
- Data Rate:
- 2.975Gbps
- Input Type:
- LVCMOS
- Output Type:
- FPD-Link III, LVDS
- Number of Inputs:
- 31
- Number of Outputs:
- 1
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
DS90UH925QSQE/NOPB FAQ
1.How can I place an order for DS90UH925QSQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UH925QSQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UH925QSQE/NOPB reliable?
The price and inventory of DS90UH925QSQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UH925QSQE/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UH925QSQE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UH925QSQE/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UH925QSQE/NOPB?
DS90UH925QSQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UH925QSQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UH925QSQE/NOPB?
For technical support, including DS90UH925QSQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UH925QSQE/NOPB requirements.
6.How does Aetrix verify that DS90UH925QSQE/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UH925QSQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UH925QSQE/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UH925QSQE/NOPB?
All DS90UH925QSQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UH925QSQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UH925QSQE/NOPB part is unused and in its original packaging.
Return procedure for DS90UH925QSQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS90UH925QSQE/NOPB Tags
-
SN65HVS880PWPR
Texas Instruments
-
SN65HVS882PWPR
Texas Instruments
-
FIN3386MTDX
onsemi
-
FIN3385MTDX
onsemi
-
SN65LV1023ARHBR
Texas Instruments
-
SN65LV1023ADBR
Texas Instruments
-
SN65LV1224BDBR
Texas Instruments
-
SN65LVDS93ADGGR
Texas Instruments
-
SN65LVDS93DGGR
Texas Instruments
-
TDES954RGZT
Texas Instruments
-
SN65LV1224BRHBT
Texas Instruments
-
DS90UB914QSQE/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
