Texas Instruments DS90UH925QSQX/NOPB
- Part No.:
- DS90UH925QSQX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90UH925QSQX/NOPB.pdf
- Description:
- IC SERIAL/DESERIAL 24BIT 48WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS90UH925QSQX/NOPB from Texas Instruments is an automotive-grade FPD-Link III serializer that converts 24-bit RGB888 video with HS/VS/DE and stereo I2S audio into a single AC-coupled differential CML stream at up to 2.975 Gbps. It integrates HDCP 1.3 cipher engine with on-chip key storage, supports 5–85 MHz PCLK, and operates from 1.8 V or 3.3 V LVCMOS I/O supply. It targets secure in-vehicle display links for navigation and rear-seat entertainment.
For engineers reviewing the DS90UH925QSQX/NOPB datasheet, DS90UH925QSQX/NOPB pinout, DS90UH925QSQX/NOPB application, or DS90UH925QSQX/NOPB equivalent, this page delivers verified technical context, real-world timing constraints, HDCP implementation details, CML output specifications, and validated alternative options for automotive display interface design.
Technical Context
The DS90UH925QSQX/NOPB implements a 35-bit serial symbol per PCLK cycle containing DC-balanced, scrambled RGB888 (24 bits), HS/VS/DE (3 bits), HDCP metadata, I2C control, and stereo I2S audio data. Its embedded PLL locks to input PCLK (5–85 MHz) and generates a 35× oversampled CML line rate (525 Mbps to 2.975 Gbps), enabling AC-coupled STP cable runs up to 10 meters.
It features bidirectional control channel over the same differential pair-supporting full-duplex I2C communication with deserializer-and includes configurable GPIOs, programmable pattern generation, and auto-power-down modes. The integrated HDCP cipher engine performs real-time encryption of both video and I2S audio payloads using keys stored in on-chip non-volatile memory.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCLK Range | 5–85 MHz: defines minimum frame rate support (e.g., 720p@60 Hz requires ≥74.25 MHz) and maximum pixel throughput. |
| Serial Line Rate | 525 Mbps to 2.975 Gbps: enables 24-bit RGB + sync + stereo I2S over one AC-coupled differential pair with embedded clock. |
| HDCP Support | HDCP 1.3 with on-chip key storage: provides content protection for automotive infotainment without external crypto IC or key management. |
| I/O Supply Options | 1.8 V ±5% or 3.3 V: allows direct interfacing with 1.8 V graphics processors or 3.3 V legacy controllers without level shifters. |
| ESD Rating | ±8 kV HBM, ±8 kV ISO 10605: meets AEC-Q100 Grade 2 requirements for robustness in automotive cabin environments. |
| Package | 48-pin WQFN (7.0 mm × 7.0 mm): surface-mount footprint optimized for EMI control and thermal dissipation in space-constrained head units. |
| Operating Temp | −40 °C to +105 °C: qualified for under-dash and display module mounting locations per AEC-Q100 Grade 2. |
Pinout & Package
DS90UH925QSQX/NOPB uses a 48-pin WQFN package (7.0 mm × 7.0 mm) with exposed thermal pad (DAP) requiring ≥9 vias to ground plane. Pin functions include parallel RGB888 inputs (R[7:0], G[7:0], B[7:0]), video control signals (HS, VS, DE), PCLK, I2S audio inputs (I2S_CLK/WC/DA), bidirectional I2C (SCL/SDA), interrupt (INTB), power-down (PDB), and CML differential outputs (DOUT+/DOUT−).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| R[7:0], G[7:0], B[7:0] | LVCMOS parallel video data inputs | Accept 24-bit RGB888 with internal pull-down; R0/G0/B0 support GPIO/GPO functions in 18-bit mode. |
| HS, VS, DE | LVCMOS video timing control inputs | Sampled synchronously to PCLK; filtered to limit transitions (e.g., ≤2/130 PCLKs for HS) to ensure reliable serialization. |
| PCLK | LVCMOS pixel clock input | Strobe edge configurable via register; minimum pulse width 3 PCLKs when control filter enabled. |
| I2S_CLK, I2S_WC, I2S_DA | LVCMOS stereo I2S audio inputs | Support 16-/24-bit stereo audio; I2S_CLK/WC/DA double as GPO_REG8/7/6 when configured. |
| SCL, SDA | Open-drain I2C control bus | 3.3 V tolerant; require 4.7 kΩ pull-up to VDD33; support standard/fast mode (100/400 kHz). |
| DOUT+, DOUT− | CML differential serial outputs | AC-coupled via 0.1 µF caps; 100 Ω differential termination; 1.25 V common-mode; 1.25 Vpp differential swing. |
| INTB | Open-drain HDCP interrupt output | Active-low signal indicating HDCP authentication status change; requires 4.7 kΩ pull-up to VDDIO. |
| PDB | LVCMOS power-down control input | High = normal operation; low = shutdown PLL and drivers, reducing IDD to <2 mA. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated HDCP 1.3 cipher engine | Enables end-to-end encrypted video/audio transmission without external security IC or firmware key handling. |
| AC-coupled STP interconnect support | Eliminates DC bias drift over long cables (up to 10 m), simplifies connector design, and avoids transformer-based coupling. |
| Backward compatibility with FPD-Link II | Interoperates with DS90UR906Q/DS90UR908Q deserializers, easing migration from legacy automotive display architectures. |
| Programmable GPIO/GPO mapping | Four pins (R0/R1/G0/G1) serve as GPIOs in 18-bit mode or as RGB data lines in 24-bit mode-configurable via MODE_SEL or register. |
| Low-power operational modes | Auto-power-down reduces supply current to <2 mA; dynamic power scaling aligns consumption with PCLK frequency and payload. |
Applications
| Automotive Navigation Display | Rear-Seat Entertainment System |
|---|---|
Use Scenario: High-resolution map rendering and turn-by-turn guidance in instrument cluster or center console display. IC Role / Device Role / Timing Role: Serializer converting GPU's RGB888 + I2S audio output into secure, noise-immune FPD-Link III stream for remote LCD panel. Use Value: Enables 720p@60 Hz video with HDCP-protected content over single twisted-pair cable, reducing harness weight by >40% vs. parallel RGB. |
Use Scenario: Dual-screen video playback with synchronized stereo audio for backseat passengers. IC Role / Device Role / Timing Role: Serializing dual-channel video frames and stereo I2S audio from media processor to seat-mounted displays. Use Value: Supports simultaneous 720p video + 48 kHz stereo audio with <145 ns latency, preserving lip-sync accuracy across distributed displays. |
| Head-Up Display (HUD) Interface | Digital Instrument Cluster |
Use Scenario: Driving assistance overlays (e.g., ADAS alerts, speed, navigation arrows) projected onto windshield. IC Role / Device Role / Timing Role: Low-latency serializer delivering real-time graphics from MCU to HUD controller with minimal jitter. Use Value: Achieves <145 ns fixed latency and <0.3 UI total jitter at 85 MHz PCLK, ensuring crisp overlay alignment with vehicle motion. |
Use Scenario: Animated gauge rendering and warning indicators in modern digital dashboards. IC Role / Device Role / Timing Role: Converting SoC's parallel RGB interface to serialized link driving TFT-LCD with integrated touch controller. Use Value: Integrates HDCP for premium content (e.g., streaming apps) while meeting AEC-Q100 Grade 2 temp and ESD requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UH925Q-Q1 | Identical silicon; Q-Q1 suffix denotes AEC-Q100 Grade 2 qualification and automotive temp range (−40°C to +105°C). DS90UH925QSQX/NOPB is the commercial-grade variant with identical functionality and pinout. | Same 720p/24-bit/HDCP/I2S feature set; differs only in qualification level and screening-no functional or electrical distinction in operation. | Select DS90UH925QSQX/NOPB for cost-sensitive non-automotive designs (e.g., industrial HMIs); choose DS90UH925Q-Q1 for production automotive systems requiring full AEC-Q100 documentation. |
| DS90UH927QSQX/NOPB | Supports 1080p (up to 125 MHz PCLK) and 36-bit color depth; adds MIPI DSI receiver interface; no HDCP engine; higher power consumption. | Targets higher-resolution displays without content protection; lacks HDCP, making it unsuitable for protected media playback. | Choose DS90UH927QSQX/NOPB only when resolution exceeds 720p and HDCP is not required; DS90UH925QSQX/NOPB remains optimal for 720p+HDCP use cases. |
Compared with DS90UH925Q-Q1 and DS90UH927QSQX/NOPB, DS90UH925QSQX/NOPB uniquely balances 720p capability, integrated HDCP 1.3, automotive-ready packaging, and commercial pricing-making it the most cost-effective solution for secure mid-resolution display links where AEC-Q100 certification is optional.
Availability
DS90UH925QSQX/NOPB is available at Aetrix Electronics and suitable for automotive navigation displays, rear-seat entertainment systems, and digital instrument clusters requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for DS90UH925QSQX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for automotive, industrial, and consumer markets.
The DS90UH925QSQX/NOPB belongs to TI's FPD-Link III serializer family, engineered specifically for high-reliability, secure, and low-EMI video transport in automotive cockpit displays and infotainment systems.
FAQ
Does DS90UH925QSQX/NOPB support HDCP re-authentication during active video transmission?
Yes, DS90UH925QSQX/NOPB supports HDCP repeater functionality, enabling dynamic re-authentication without video interruption. The integrated cipher engine handles key exchange and session renewal over the bidirectional FPD-Link III control channel, maintaining continuous encrypted video flow during hot-plug or link renegotiation events.
What is the maximum supported cable length for DS90UH925QSQX/NOPB with 720p@60 Hz operation?
DS90UH925QSQX/NOPB supports up to 10 meters of 100 Ω STP cable at 720p@60 Hz (74.25 MHz PCLK) with AC coupling. Performance depends on cable quality and termination; TI recommends using shielded twisted-pair with controlled impedance and proper CMF filtering to maintain signal integrity and meet jitter specs (<0.3 UI).
Can DS90UH925QSQX/NOPB operate with a 1.8 V I/O supply while using 3.3 V for core logic?
Yes, DS90UH925QSQX/NOPB supports independent supplies: VDD33 (3.0–3.6 V) powers internal regulators and PLL, while VDDIO (1.71–1.89 V or 3.0–3.6 V) sets LVCMOS I/O voltage. This allows direct connection to 1.8 V GPUs without level shifters, while maintaining robust 3.3 V core operation.
How does DS90UH925QSQX/NOPB handle video control signal filtering for HS/VS/DE?
DS90UH925QSQX/NOPB applies configurable control signal filtering: when enabled, HS/VS/DE pulses must be ≥3 PCLKs wide (HS/DE) or ≥130 PCLKs wide (VS), limiting transitions to 2/130 PCLKs (HS/DE) or 1/130 PCLKs (VS). Filtering suppresses noise-induced false sync edges but can be disabled for legacy timing sources.
Is DS90UH925QSQX/NOPB pin-compatible with DS90UH925Q-Q1?
Yes, DS90UH925QSQX/NOPB is fully pin-compatible and functionally identical to DS90UH925Q-Q1. Both share the same 48-pin WQFN package, pinout, electrical characteristics, and register map. The only differences are qualification level (commercial vs. AEC-Q100 Grade 2) and screening-no PCB or firmware changes are needed for substitution.
DS90UH925QSQX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Serializer
- Data Rate:
- 2.975Gbps
- Input Type:
- LVCMOS
- Output Type:
- FPD-Link III, LVDS
- Number of Inputs:
- 31
- Number of Outputs:
- 1
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
DS90UH925QSQX/NOPB FAQ
1.How can I place an order for DS90UH925QSQX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UH925QSQX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UH925QSQX/NOPB reliable?
The price and inventory of DS90UH925QSQX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UH925QSQX/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UH925QSQX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UH925QSQX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UH925QSQX/NOPB?
DS90UH925QSQX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UH925QSQX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UH925QSQX/NOPB?
For technical support, including DS90UH925QSQX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UH925QSQX/NOPB requirements.
6.How does Aetrix verify that DS90UH925QSQX/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UH925QSQX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UH925QSQX/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UH925QSQX/NOPB?
All DS90UH925QSQX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UH925QSQX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UH925QSQX/NOPB part is unused and in its original packaging.
Return procedure for DS90UH925QSQX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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