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Texas Instruments DS90UH926QSQE/NOPB
- Part No.:
- DS90UH926QSQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 60-WFQFN Exposed Pad
- Datasheet:
-
DS90UH926QSQE/NOPB.pdf
- Description:
- IC SERIAL/DESERIAL 24BIT 60WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,768
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Product details
Overview
DS90UH926QSQE/NOPB from Texas Instruments is an AEC-Q100 Grade 2 automotive FPD-Link III deserializer that recovers 720p RGB888 video, HS/VS/DE timing, and stereo I2S audio from a single AC-coupled differential pair; supports 5–85 MHz PCLK, 1.8 V or 3.3 V LVCMOS I/O, and integrated HDCP cipher engine with on-chip key storage for secure display links in navigation and rear-seat entertainment systems.
For engineers reviewing the DS90UH926QSQE/NOPB datasheet, DS90UH926QSQE/NOPB pinout, DS90UH926QSQE/NOPB application, or DS90UH926QSQE/NOPB equivalent, this page delivers verified technical context, exact pin functions, real-world automotive use cases, and validated alternative parts - all grounded in TI's production-grade SNLS337M datasheet (Rev M, Aug 2017).
Technical Context
The DS90UH926QSQE/NOPB implements adaptive cable equalization to support up to 10-meter STP interconnects at 85 MHz PCLK, extracts embedded clock without training sequences via its LOCK pin, and embeds HDCP 1.3 cipher logic with on-chip key storage for content-protected video distribution. Its 31-bit parallel LVCMOS output includes R[7:0], G[7:0], B[7:0], HS, VS, DE, PCLK, I2S_CLK/WC/DA, and MCLK.
It features bidirectional I2C-compatible control channel over the same FPD-Link III physical layer, supports backward-compatible modes, and integrates EMI reduction via spread-spectrum clock generation (SSCG) and enhanced progressive turn-on (EPTO). The device operates from single 3.3 V supply with 1.8 V or 3.3 V I/O flexibility and enters low-power states via PDB and OEN pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCLK Range | 5–85 MHz - defines maximum pixel rate for 720p RGB888 video transmission |
| Input Interface | Single-pair AC-coupled FPD-Link III - reduces EMI and eliminates skew vs parallel bus |
| Output Interface | 31-bit LVCMOS parallel - carries RGB888 (24 bits), HS/VS/DE (3 bits), I2S (3 bits), MCLK (1 bit) |
| HDCP Support | Integrated HDCP 1.3 cipher + on-chip key storage - enables secure video replay in automotive displays |
| Supply Voltage | VDD33 = 3.0–3.6 V; VDDIO = 1.71–1.89 V or 3.0–3.6 V - dual-voltage I/O simplifies interface to GPU or display controller |
| Operating Temp | −40°C to +105°C (AEC-Q100 Grade 2) - qualified for under-dash automotive display environments |
| Cable Reach | Up to 10 m over 100 Ω STP - enabled by adaptive equalizer and CML receiver architecture |
Pinout & Package
DS90UH926QSQE/NOPB uses a 60-pin WQFN (NKB) package with 9.00 mm × 9.00 mm body and exposed thermal pad (DAP) requiring ≥9 vias to GND for thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| R[7:0] (Pins 33,34,35,36,37,39,40,41) | RGB Data Output | LVCMOS outputs for red channel; each pin drives one bit of 8-bit red data; pulldown enabled |
| G[7:0] (Pins 20,21,22,23,25,26,27,28) | RGB Data Output | LVCMOS outputs for green channel; shared with GPIO2/GPIO3 in 18-bit mode |
| B[7:0] (Pins 9,10,11,12,14,17,18,19) | RGB Data Output | LVCMOS outputs for blue channel; B0/B1 double as GPO_REG4/I2S_DB in configurable mode |
| HS / VS / DE / PCLK (Pins 8,7,6,5) | Video Timing Outputs | LVCMOS sync signals with pulse-width constraints (e.g., HS min 3×PCLK when filter enabled) |
| RIN+ / RIN− (Pins 49,50) | FPD-Link III Input | Differential LVDS inputs requiring 0.1 µF AC coupling; internal 100 Ω termination |
| LOCK (Pin 32) | Status Indicator | Open-drain output indicating PLL lock status - used for display enable or link health monitoring |
| PDB (Pin 59) | Power Control | Active-high enable; pulls LVCMOS outputs to tri-state and shuts down PLL when low |
| SCL / SDA (Pins 3,2) | I2C Control Interface | Open-drain bidirectional bus for configuration and status readback; requires 4.7 kΩ pull-up to VDD33 |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive Cable Equalization | Compensates for frequency-dependent loss in 10-m STP cables, enabling robust 85-MHz operation without manual tuning |
| Embedded Clock Recovery | Locks to serial stream without SYNC patterns or training sequences - reduces startup latency and simplifies system initialization |
| HDCP 1.3 Engine + On-Chip Keys | Enables secure video path for OEM displays without external crypto IC or key provisioning infrastructure |
| SSCG & EPTO EMI Reduction | Reduces peak radiated emissions by spreading clock spectrum (±0.5–2.5%) and controlling edge rates on LVCMOS outputs |
| Configurable I/O Voltage | Supports 1.8 V or 3.3 V LVCMOS interfaces - matches GPU or display controller I/O voltage without level shifters |
| Bidirectional I2C Backchannel | Allows host processor to read deserializer status (e.g., PASS, LOCK) and configure registers over same FPD-Link III physical layer |
Applications
| Automotive Navigation Display | Rear-Seat Entertainment System |
|---|---|
Use Scenario: High-resolution map rendering and turn-by-turn guidance on central dashboard LCD. IC Role / Device Role / Timing Role: Deserializes encrypted 720p video and audio from head-unit graphics processor over single twisted pair. Use Value: Reduces wiring harness weight and EMI vs parallel RGB; HDCP compliance satisfies content licensing requirements. |
Use Scenario: Dual-screen video playback for backseat passengers using HDMI source converted to FPD-Link III. IC Role / Device Role / Timing Role: Receives serialized video/audio stream and reconstructs parallel RGB888 + I2S stereo output for local display driver IC. Use Value: Enables long-cable routing (≤10 m) within vehicle cabin while maintaining HDCP-protected content integrity. |
| Instrument Cluster Video Overlay | Head-Up Display (HUD) Video Interface |
Use Scenario: Overlaying speed, warnings, and ADAS alerts onto analog or digital instrument cluster. IC Role / Device Role / Timing Role: Converts serialized video from domain controller into precise timing-aligned RGB + DE/HS/VS for TFT timing controller. Use Value: Eliminates skew between color channels and sync signals - critical for sharp text and icon rendering. |
Use Scenario: Driving video content from infotainment system to optical combiner in HUD module. IC Role / Device Role / Timing Role: Provides low-jitter PCLK and stable LOCK signal to synchronize projection timing with vehicle motion data. Use Value: Adaptive equalization maintains signal integrity across varying cabin temperatures and cable flexing conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UH926QSQ/NOPB | No suffix '-Q1'; not AEC-Q100 qualified; rated −40°C to +85°C only | Non-automotive industrial or commercial displays where automotive qualification is unnecessary | Select when automotive temperature grade and ESD robustness (HBM ±8 kV) are not required |
| DS90UH948RTVR | 1080p-capable deserializer with 4-lane FPD-Link III input; supports higher bandwidth and daisy-chain topology | High-end digital instrument clusters or multi-display systems requiring >720p resolution | Choose for future-proofing or when migrating from 720p to full HD display architectures |
Compared with DS90UH926QSQE/NOPB, DS90UH926QSQ/NOPB lacks automotive qualification and thermal margin, while DS90UH948RTVR adds resolution scalability but increases BOM cost and layout complexity - making DS90UH926QSQE/NOPB optimal for cost-sensitive, AEC-Q100-compliant 720p display links.
Availability
DS90UH926QSQE/NOPB is available at Aetrix Electronics and suitable for automotive navigation displays, rear-seat entertainment systems, and instrument cluster video overlays requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.
Supply support for DS90UH926QSQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with deep expertise in automotive electronics and high-speed interface IP.
DS90UH926QSQE/NOPB belongs to TI's FPD-Link III serializer/deserializer product line, engineered specifically for secure, low-EMI, long-cable video transport in automotive infotainment and digital cockpit systems.
FAQ
What is the primary function of DS90UH926QSQE/NOPB in an automotive display system?
The DS90UH926QSQE/NOPB acts as an FPD-Link III deserializer that converts a high-speed serialized video stream - carrying 720p RGB888, HS/VS/DE, and stereo I2S audio - back into parallel LVCMOS signals for display timing controllers. It performs clock recovery, HDCP decryption, and adaptive equalization, enabling secure, low-skew, long-cable video distribution in automotive environments.
Does DS90UH926QSQE/NOPB support both 1.8 V and 3.3 V I/O interfaces?
Yes, DS90UH926QSQE/NOPB supports dual-voltage LVCMOS I/O: VDDIO can be set to either 1.71–1.89 V or 3.0–3.6 V, allowing direct interfacing with 1.8 V display controllers or 3.3 V GPUs without external level shifters. All parallel outputs (R/G/B/HS/VS/DE/PCLK/I2S) comply with the selected VDDIO voltage.
How does DS90UH926QSQE/NOPB handle HDCP content protection?
DS90UH926QSQE/NOPB integrates a full HDCP 1.3 cipher engine with on-chip non-volatile key storage. It authenticates and decrypts incoming HDCP-encrypted streams from compatible serializers like DS90UH925Q-Q1, enabling compliant video replay without external security ICs - satisfying OEM content licensing requirements for navigation and streaming video.
What is the maximum cable length supported by DS90UH926QSQE/NOPB?
DS90UH926QSQE/NOPB supports up to 10 meters of 100 Ω shielded twisted-pair (STP) cable using adaptive equalization, validated at 85 MHz PCLK. Performance depends on cable quality and noise environment; TI recommends AC coupling with 0.1 µF capacitors on RIN+/RIN− and proper grounding of the DAP thermal pad for optimal reach.
Is DS90UH926QSQE/NOPB pin-compatible with other devices in the DS90UH92xQ family?
DS90UH926QSQE/NOPB shares the same 60-pin WQFN (NKB) package and core pinout with DS90UH925Q-Q1 (serializer) and DS90UH926QSQ/NOPB (non-Q1 version), but is not pin-compatible with higher-resolution variants like DS90UH948RTVR. Critical signals (RIN+/RIN−, LOCK, PDB, SCL/SDA) align across Q1-grade parts, enabling layout reuse in qualified designs.
DS90UH926QSQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 60-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Deserializer
- Data Rate:
- 2.975Gbps
- Input Type:
- FPD-Link III, LVDS
- Output Type:
- LVCMOS
- Number of Inputs:
- 1
- Number of Outputs:
- 31
- Voltage - Supply:
- 1.71V ~ 1.89V, 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 60-WQFN (9x9)
DS90UH926QSQE/NOPB FAQ
1.How can I place an order for DS90UH926QSQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UH926QSQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UH926QSQE/NOPB reliable?
The price and inventory of DS90UH926QSQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UH926QSQE/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UH926QSQE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UH926QSQE/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UH926QSQE/NOPB?
DS90UH926QSQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UH926QSQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UH926QSQE/NOPB?
For technical support, including DS90UH926QSQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UH926QSQE/NOPB requirements.
6.How does Aetrix verify that DS90UH926QSQE/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UH926QSQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UH926QSQE/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UH926QSQE/NOPB?
All DS90UH926QSQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UH926QSQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UH926QSQE/NOPB part is unused and in its original packaging.
Return procedure for DS90UH926QSQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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