Texas Instruments DS90UH928QSQ/NOPB
- Part No.:
- DS90UH928QSQ/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90UH928QSQ/NOPB.pdf
- Description:
- IC DESERIALIZER LVDS 48WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS90UH928QSQ/NOPB from Texas Instruments is an automotive-grade FPD-Link III deserializer that converts high-speed serialized video/audio with embedded clock over a single AC-coupled STP pair into four LVDS data streams, one LVDS clock (OpenLDI), and up to four I2S audio outputs. It supports 5–85 MHz pixel clocks, RGB888 + HS/VS/DE timing, HDCP 1.3 cipher engine with on-chip key storage, and operates from a single 3.3 V supply with 1.8 V/3.3 V configurable I/O.
For engineers reviewing the DS90UH928QSQ/NOPB datasheet, DS90UH928QSQ/NOPB pinout, DS90UH928QSQ/NOPB application, or DS90UH928QSQ/NOPB equivalent, this page delivers verified functional role, validated pin functions, confirmed automotive-grade specs (AEC-Q100 Grade 2, −40°C to +105°C), real-world HDCP repeater capability, and precise I2S timing constraints for surround sound integration in infotainment displays.
Technical Context
The DS90UH928QSQ/NOPB implements adaptive cable equalization on its FPD-Link III receiver (RIN±) to compensate for up to 10-meter STP channel loss, with deterministic jitter tolerance of 0.35 UI. Its internal PLL locks to the embedded serial clock and regenerates low-jitter LVDS outputs (TxCLKOUT±, TxOUT[3:0]±) meeting OpenLDI timing requirements.
It integrates bidirectional control via I²C-compatible SDA/SCL, supports HDCP repeater mode through dedicated INTB_IN and PASS/LOCK status pins, and provides register-accessible GPIOs (GPIO_REG[8:5]) shared with I2S_CLK/WC/DA/DB - enabling synchronized audio routing and display configuration without external logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Pixel Clock Range | 5 MHz to 85 MHz - supports 720p HD video with precise timing alignment across all LVDS outputs |
| HDCP Support | HDCP 1.3 with on-chip key storage and repeater capability - enables secure content distribution in multi-display automotive systems |
| I²C Interface | Standard-mode compatible (400 kHz max) with open-drain SDA/SCL - allows host processor configuration without level-shifting |
| LVDS Output Swing | 140–300 mV single-ended (400–600 mV differential) - ensures robust noise margin on OpenLDI-compliant displays |
| Supply Configuration | Single 3.3 V VDD33 with 1.8 V or 3.3 V VDDIO - simplifies power design while supporting legacy or low-voltage display interfaces |
| ESD Rating | ±8 kV HBM, ±1.25 kV CDM - meets AEC-Q100 Grade 2 requirements for harsh automotive environments |
| Operating Temperature | −40°C to +105°C ambient - qualified for under-dash and center-stack display applications |
Pinout & Package
DS90UH928QSQ/NOPB is housed in a thermally enhanced 48-pin WQFN package (7.0 mm × 7.0 mm) with exposed thermal pad (DAP = GND). The package supports high-density automotive PCB layouts and requires ≥9 vias to ground plane for thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RIN+/RIN− | FPD-Link III differential input | AC-coupled receiver with 100 Ω internal termination - accepts scrambled, DC-balanced serial stream from DS90UH927Q serializer |
| TxCLKOUT+/−, TxOUT[3:0]+/− | LVDS video output interface | Four data pairs + clock compliant with OpenLDI (FPD-Link) standard - require external 100 Ω differential termination |
| SDA/SCL | I²C control bus interface | Open-drain, 3.3 V tolerant - enables read/write access to 128-byte register map for HDCP, GPIO, and timing configuration |
| LOCK/PASS | Status monitoring outputs | LOCK = active-high PLL lock indicator; PASS = BIST success flag - used for system-level link health validation |
| MCLK/I2S_WC/I2S_CLK/I2S_DA–DD | I²S audio interface | Four independent I²S outputs with master clock and word clock - support discrete 5.1/7.1 surround sound routing to separate amplifiers |
| PDB | Power-down control input | Active-high enable pin - drives device into ultra-low-power state (IDDZ ≤ 8 mA) with tri-stated outputs and reset registers |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive cable equalization | Compensates for frequency-dependent loss in 10-meter STP cables - maintains signal integrity without manual tuning |
| HDCP repeater mode | Enables downstream HDCP authentication chain - required for multi-display head units with daisy-chained displays |
| Backward compatibility modes | Supports legacy FPD-Link (OpenLDI) timing via MODE_SEL configuration - eases migration from older display interfaces |
| Image enhancement engine | On-chip white balance and dithering - improves visual fidelity on low-bit-depth LVDS panels without host CPU overhead |
| 4-channel I²S audio | Dedicated MCLK, word clock, and four data outputs - eliminates need for external audio switches or multiplexers in surround systems |
Applications
| Automotive Navigation Display | Rear Seat Entertainment |
|---|---|
Use Scenario: High-resolution 720p LCD cluster display driven by central graphics processor via long harness. IC Role / Device Role / Timing Role: Deserializes FPD-Link III stream into OpenLDI-compliant LVDS signals and routes I2S audio to local amplifier. Use Value: Reduces EMI and connector count vs. parallel RGB; enables HDCP-protected map updates and video streaming. | Use Scenario: Dual-screen rear-seat system with independent audio zones and HDMI-to-FPD-Link bridge. IC Role / Device Role / Timing Role: Acts as HDCP repeater to authenticate content between source and secondary display; outputs four I2S channels for discrete speaker feeds. Use Value: Eliminates need for dual HDCP stacks; supports spatial audio rendering without additional audio ICs. |
| Instrument Cluster Video Overlay | Head-Up Display (HUD) Interface |
Use Scenario: Overlaying vehicle telemetry onto analog video feed using FPGA-based compositor. IC Role / Device Role / Timing Role: Receives serialized graphics from MCU and outputs synchronized LVDS + I2S for HUD driver and audio feedback. Use Value: Provides sub-10 ns skew between video and audio paths - critical for lip-sync in voice-guided navigation alerts. | Use Scenario: Compact HUD module requiring low EMI, minimal board space, and high reliability. IC Role / Device Role / Timing Role: Converts FPD-Link III input to LVDS clock/data with embedded DE/HS/VS for timing-critical projection control. Use Value: AC-coupled differential signaling suppresses radiated emissions near sensitive optical sensors; WQFN package fits tight mechanical envelopes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UH928QSQX/NOPB | Same silicon, tape-and-reel packaging variant - identical electrical and thermal specs, no functional difference | No change in system integration; differs only in logistics (reel vs. tray) | Select when volume production requires automated placement compatibility |
| DS90UH926QSQ/NOPB | Lacks integrated HDCP engine and I2S audio outputs - supports only video deserialization with GPIO-only control | Not suitable for content-protected or multi-zone audio systems; limited to basic display bridging | Choose only if HDCP and surround audio are unnecessary and BOM cost reduction is primary goal |
Compared with DS90UH928QSQ/NOPB, DS90UH928QSQX/NOPB offers identical functionality in reel format for SMT lines, while DS90UH926QSQ/NOPB removes HDCP and I2S to reduce cost - making it viable only for non-secure, audio-less display links.
Availability
DS90UH928QSQ/NOPB is available at Aetrix Electronics and suitable for automotive navigation displays, rear seat entertainment systems, and instrument cluster video overlays requiring stable component supply, AEC-Q100 compliance, and long-term lifecycle assurance.
Supply support for DS90UH928QSQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for automotive, industrial, and communications markets.
The DS90UH928QSQ/NOPB belongs to TI's FPD-Link III automotive serializer/deserializer product line, designed specifically to replace bulky parallel RGB interfaces with secure, low-EMI, long-reach serial links for next-generation automotive displays.
FAQ
What is the primary function of the DS90UH928QSQ/NOPB in an automotive infotainment system?
The DS90UH928QSQ/NOPB functions as an FPD-Link III deserializer that receives high-speed serialized video, audio, and control data over a single differential pair and outputs compliant OpenLDI LVDS signals plus up to four I2S audio streams. It enables secure, low-EMI transmission of 720p content between graphics processors and displays while integrating HDCP 1.3 protection and adaptive equalization - all critical for modern automotive display architectures.
Does the DS90UH928QSQ/NOPB support HDCP repeater functionality, and how is it implemented?
Yes, the DS90UH928QSQ/NOPB supports HDCP repeater mode via its integrated HDCP 1.3 cipher engine and on-chip key storage. When configured with MODE_SEL, it authenticates upstream content and re-encrypts it for downstream displays, using INTB_IN to signal handshake events and PASS/LOCK pins to monitor link integrity - enabling daisy-chained multi-display systems without external HDCP controllers.
What are the voltage requirements for VDDIO on the DS90UH928QSQ/NOPB, and how does it affect I/O compatibility?
The DS90UH928QSQ/NOPB supports VDDIO at either 1.8 V or 3.3 V, allowing direct interfacing with both low-voltage display timing controllers and legacy 3.3 V LVCMOS peripherals. At 1.8 V, VIH is 0.65×VDDIO (min) and VOL is 0.45 V (max); at 3.3 V, VIH is 2.0 V (min) and VOL is 0.4 V (max). This dual-rail flexibility eliminates level shifters in mixed-voltage automotive designs.
How does the DS90UH928QSQ/NOPB handle long cable runs, and what is the maximum supported length?
The DS90UH928QSQ/NOPB incorporates adaptive input equalization on its RIN± receiver to compensate for attenuation and dispersion in shielded twisted-pair (STP) cables. Verified operation extends to 10 meters of standard 100 Ω STP cable at 85 MHz pixel clock, maintaining bit error rate <1e−12 - enabling centralized head-unit placement with remote displays in large vehicles.
Can the DS90UH928QSQ/NOPB be used without HDCP, and what configuration changes are needed?
Yes, the DS90UH928QSQ/NOPB can operate in non-HDCP mode by disabling the cipher engine via register 0x0E[7] and configuring MODE_SEL for non-repeater operation. In this state, it functions as a standard FPD-Link III-to-OpenLDI deserializer with full video and I2S audio capability - ideal for internal diagnostics, development, or non-content-protected applications like vehicle camera feeds.
DS90UH928QSQ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Deserializer
- Data Rate:
- 2.975Gbps
- Input Type:
- FPD-Link III, LVDS
- Output Type:
- LVCMOS
- Number of Inputs:
- 1
- Number of Outputs:
- 5
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
DS90UH928QSQ/NOPB FAQ
1.How can I place an order for DS90UH928QSQ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UH928QSQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UH928QSQ/NOPB reliable?
The price and inventory of DS90UH928QSQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UH928QSQ/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UH928QSQ/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UH928QSQ/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UH928QSQ/NOPB?
DS90UH928QSQ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UH928QSQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UH928QSQ/NOPB?
For technical support, including DS90UH928QSQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UH928QSQ/NOPB requirements.
6.How does Aetrix verify that DS90UH928QSQ/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UH928QSQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UH928QSQ/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UH928QSQ/NOPB?
All DS90UH928QSQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UH928QSQ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UH928QSQ/NOPB part is unused and in its original packaging.
Return procedure for DS90UH928QSQ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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