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Texas Instruments DS90UH947TRGCRQ1
- Part No.:
- DS90UH947TRGCRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 64-VFQFN Exposed Pad
- Datasheet:
-
DS90UH947TRGCRQ1.pdf
- Description:
- IC SERIALIZER LDI TO FPD 64VQFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,001
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Product details
Overview
DS90UH947TRGCRQ1 from Texas Instruments is an AEC-Q100 Grade 2 automotive-qualified OpenLDI-to-FPD-Link III serializer supporting up to 170 MHz pixel clock, dual-lane 2.975 Gbps/lane serial output, integrated HDCP v1.4 cipher engine, and I²C/SPI control interfaces. It bridges LVDS-based graphics processors to FPD-Link III deserializers in high-resolution infotainment displays.
For engineers reviewing the DS90UH947TRGCRQ1 datasheet, DS90UH947TRGCRQ1 pinout, DS90UH947TRGCRQ1 application, or DS90UH947TRGCRQ1 equivalent, key selection considerations include OpenLDI input compatibility (18-/24-bit RGB), dual-link timing margin at 1080p60/WUXGA, HDCP key storage security, back-channel GPIO bandwidth (2 Mbps), and thermal lock stability across −40°C to +105°C.
Technical Context
The DS90UH947TRGCRQ1 implements a parallel-to-serial conversion architecture with two configurable FPD-Link III lanes operating at up to 2.975 Gbps per lane or a single lane at up to 3.36 Gbps. It embeds clock recovery, DC-balanced scrambling, and forward-channel payload packing of RGB video, sync signals, I²C, SPI, GPIO, and I²S audio data.
Its bidirectional control channel (BCC) enables full-duplex I²C bridging between host and remote devices over the same differential link, while integrated loop filters (LF, LFOLDI) support stable PLL lock under temperature ramp conditions (TCLH1/TCLH2 up to 80°C/105°C). The device supports backward compatibility with DS90UH926Q-Q1/DS90UH928Q-Q1 deserializers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Interface | OpenLDI (LVDS) with 8 data + 1 clock pairs; supports 18-bit or 24-bit RGB configuration |
| Output Interface | FPD-Link III with single- or dual-lane operation; 3.36 Gbps max (single) or 2.975 Gbps/lane (dual) |
| Pixel Clock Support | Up to 170 MHz for WUXGA (1920×1200) and 1080p60 with 24-bit color depth |
| HDCP Compliance | HDCP v1.4 with on-chip key storage and cipher engine for secure content transmission |
| Operating Temperature | AEC-Q100 Grade 2: −40°C to +105°C ambient; validated continuous PLL lock across thermal ramps |
| Power Supply | VDD11 = 1.1 V ±5% (core), VDD18 = 1.8 V ±5% (I/O), VDDIO = 1.8 V or 3.3 V selectable via I2CSEL |
| I²C Interface | Master/slave I²C with Fast-Mode Plus support up to 1 Mbps; open-drain SDA/SCL with 4.7 kΩ pull-up recommendation |
Pinout & Package
VQFN-64 package (9.00 mm × 9.00 mm) with exposed thermal pad (DAP = GND); RoHS-compliant, automotive-grade wettable flank lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0+ to D7+ | True LVDS Data Inputs | Accept standard OpenLDI differential video data; require external 100-Ω termination |
| D0− to D7− | Inverting LVDS Data Inputs | Paired with true inputs for full 8-bit RGB + sync; matched routing critical for skew control |
| CLK+, CLK− | LVDS Clock Input | Differential pixel clock reference; determines maximum resolution and timing margin |
| DOUT0+, DOUT0− | FPD-Link III Lane 0 Output | AC-coupled serial output (33-nF capacitor); supports up to 3.36 Gbps in single-lane mode |
| DOUT1+, DOUT1− | FPD-Link III Lane 1 Output | AC-coupled serial output; active only in dual-lane mode for 170 MHz pixel clock support |
| SDA, SCL | I²C Bidirectional Bus | Open-drain interface for local configuration and remote BCC bridging; 1.8 V/3.3 V level selectable |
| PDB | Power-Down Mode Input | LVCMOS input controlling shutdown state; low = power-down (IDDZ ≤15 mA) |
| INTB | Remote Interrupt Output | Open-drain interrupt signal from deserializer side; requires external 4.7 kΩ pull-up to VDDIO |
Key Features
| Feature | Design Value |
|---|---|
| Automotive Qualification | AEC-Q100 Grade 2 qualified with full thermal ramp validation (−40°C to +105°C) |
| HDCP Integration | On-chip HDCP v1.4 cipher engine and key storage eliminate external security ICs |
| Back Channel Bandwidth | 2 Mbps high-speed GPIO channel for real-time status/control without latency penalty |
| Cable Drive Capability | Supports up to 15 m coaxial or STP cable with automatic compensation for temperature drift and aging |
| Interoperability | Backward compatible with DS90UH926Q-Q1/DS90UH928Q-Q1 deserializers for legacy system upgrades |
| Audio Transport | I²S slave interface (4 data lines + WC + CLK) enables encrypted multi-channel audio embedding into FPD-Link III stream |
Applications
| IVI Head Unit Display Interface | Rear Seat Entertainment System |
|---|---|
Use Scenario: Connecting SoC-based graphics processor to high-brightness TFT display in vehicle center stack. IC Role / Device Role / Timing Role: Serializer converting OpenLDI video to robust FPD-Link III for EMI-resistant cable transmission. Use Value: Enables 1080p60 resolution over 10 m STP cable with HDCP-protected content and <294 ns end-to-end latency. |
Use Scenario: Driving dual 1080p displays from single GPU in premium rear-seat entertainment module. IC Role / Device Role / Timing Role: Dual-lane serializer delivering 170 MHz pixel clock to support WUXGA resolution. Use Value: Eliminates separate clock/data routing; reduces interconnect weight by consolidating video, audio, and control onto two differential pairs. |
| Digital Instrument Cluster | Automotive Security Camera Link |
Use Scenario: Transmitting safety-critical gauge and ADAS overlay graphics from MCU to cluster LCD. IC Role / Device Role / Timing Role: Low-latency serializer with fail-safe PDB-controlled power-down and INTB fault signaling. Use Value: Meets ASIL-B timing requirements with <5 ms PLL lock time and guaranteed operation at 105°C junction temperature. |
Use Scenario: Bridging camera sensor LVDS output to central domain controller over long harness runs. IC Role / Device Role / Timing Role: Serializer adapting OpenLDI camera data to FPD-Link III for centralized processing. Use Value: Supports 15 m cable reach with automatic aging compensation-critical for field-replaceable camera modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UH949TRGCRQ1 | Higher-speed variant: supports up to 200 MHz pixel clock and 3.75 Gbps/lane; adds MIPI D-PHY receiver option | Targeted at next-gen 4K instrument clusters and HUD systems requiring >170 MHz timing margin | Select DS90UH949TRGCRQ1 when future-proofing for >1080p60 resolutions or MIPI integration |
| DS90UB947TRGCRQ1 | Pin-compatible upgrade with enhanced HDCP 2.2 support, improved jitter transfer (δSTX <0.05 dB), and extended 125°C junction rating | Suitable for high-temperature zones (e.g., under-hood display controllers) and premium content protection requirements | Choose DS90UB947TRGCRQ1 for HDCP 2.2 compliance or operation beyond +105°C ambient |
Compared with DS90UH947TRGCRQ1, DS90UH949TRGCRQ1 extends resolution headroom and interface flexibility, while DS90UB947TRGCRQ1 prioritizes security and thermal robustness-neither offers drop-in replacement without firmware or layout review due to differing register maps and thermal design requirements.
Availability
DS90UH947TRGCRQ1 is available at Aetrix Electronics and suitable for automotive infotainment head units, digital instrument clusters, and rear-seat entertainment systems requiring stable component supply across extended product lifecycles.
Supply support for DS90UH947TRGCRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader focused on analog, embedded processing, and connectivity technologies for automotive, industrial, and personal electronics markets.
The DS90UH947TRGCRQ1 belongs to TI's FPD-Link III automotive serializer family, designed specifically to replace legacy LVDS interconnects with higher bandwidth, lower EMI, and integrated content protection in safety-critical display systems.
FAQ
What is the maximum supported resolution and color depth for DS90UH947TRGCRQ1?
The DS90UH947TRGCRQ1 supports up to WUXGA (1920×1200) and 1080p60 resolutions with 24-bit color depth. In dual-lane mode, it achieves this using a 170 MHz pixel clock; in single-lane mode, maximum is 96 MHz (1080p60). Color depth is fixed at 18-bit or 24-bit RGB, configurable via MODE_SEL pins. DS90UH947TRGCRQ1 does not support YUV or compressed formats.
Does DS90UH947TRGCRQ1 support HDCP key updates in-system?
No, DS90UH947TRGCRQ1 integrates a fixed HDCP v1.4 cipher engine with on-chip key storage programmed during manufacturing. Keys cannot be updated or reprogrammed in-field. Authentication occurs transparently during link initialization; no host software intervention is required. DS90UH947TRGCRQ1 does not support HDCP 2.2 or dynamic key exchange protocols.
How is the I²C voltage level selected on DS90UH947TRGCRQ1?
I²C voltage level is set by the I2CSEL pin: tie to VDDIO with a 10-kΩ resistor for 1.8-V I²C operation; leave floating for 3.3-V I²C. This selection is sampled at power-up and latched. SDA and SCL pins are open-drain and require external 4.7 kΩ pull-up resistors to the chosen I²C supply rail. DS90UH947TRGCRQ1 does not auto-detect or dynamically switch I²C voltage levels.
Can DS90UH947TRGCRQ1 operate with only one FPD-Link III lane enabled?
Yes, DS90UH947TRGCRQ1 supports both single- and dual-lane FPD-Link III output modes. Single-lane mode operates up to 3.36 Gbps (875 Mbps–3.36 Gbps range) and supports resolutions up to 96 MHz pixel clock (e.g., 1080p60). Dual-lane mode splits the payload across two lanes at up to 2.975 Gbps each, enabling 170 MHz pixel clock for WUXGA. Mode selection is controlled by MODE_SEL0/MODE_SEL1 pins.
What is the purpose of the LF and LFOLDI pins on DS90UH947TRGCRQ1?
LF (FPD-Link III Loop Filter) and LFOLDI (OpenLDI Loop Filter) are analog filter nodes for internal PLLs. LF connects to a 10-nF capacitor to GND to stabilize the FPD-Link III transmitter PLL; LFOLDI connects to another 10-nF capacitor to GND for the OpenLDI receiver PLL. These capacitors set loop bandwidth and phase margin-omitting or mis-sizing them causes loss of lock or excessive jitter. DS90UH947TRGCRQ1 requires both capacitors for guaranteed operation across temperature.
DS90UH947TRGCRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Serializer
- Data Rate:
- 5.95Gbps
- Input Type:
- LVDS
- Output Type:
- FPD-Link III, LVDS
- Number of Inputs:
- 8
- Number of Outputs:
- 2
- Voltage - Supply:
- 1.71V ~ 1.89V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-VQFN (9x9)
DS90UH947TRGCRQ1 FAQ
1.How can I place an order for DS90UH947TRGCRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UH947TRGCRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UH947TRGCRQ1 reliable?
The price and inventory of DS90UH947TRGCRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UH947TRGCRQ1 is usually 5 days.
3.What payment methods are accepted for DS90UH947TRGCRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UH947TRGCRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UH947TRGCRQ1?
DS90UH947TRGCRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UH947TRGCRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UH947TRGCRQ1?
For technical support, including DS90UH947TRGCRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UH947TRGCRQ1 requirements.
6.How does Aetrix verify that DS90UH947TRGCRQ1 is sourced from the original manufacturer or authorized distributors?
All DS90UH947TRGCRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UH947TRGCRQ1 meets industry standards.
7.What is the process for return or replacement of DS90UH947TRGCRQ1?
All DS90UH947TRGCRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with DS90UH947TRGCRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UH947TRGCRQ1 part is unused and in its original packaging.
Return procedure for DS90UH947TRGCRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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