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Texas Instruments DS90UR124QVS/NOPB
- Part No.:
- DS90UR124QVS/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 64-TQFP
- Datasheet:
-
DS90UR124QVS/NOPB.pdf
- Description:
- IC SER/DESER 5-43MHZ 24B 64-TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,500
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Product details
Overview
DS90UR124QVS/NOPB from Texas Instruments is an automotive-grade FPD-Link II deserializer IC that converts a single LVDS serial stream (5–43 MHz pixel clock) into a 24-bit LVCMOS parallel interface for RGB666 + HS/VS/DE + 3 GP channels, supporting 18-bit color displays in harsh environments. It operates from −40°C to +105°C, requires no external reference clock, and drives up to 10 m shielded twisted-pair cable.
For engineers reviewing the DS90UR124QVS/NOPB datasheet, DS90UR124QVS/NOPB pinout, DS90UR124QVS/NOPB application, or DS90UR124QVS/NOPB equivalent, this page delivers verified technical context, validated pin functions, AEC-Q100 Grade 2 compliance details, and real-world automotive display interface design considerations - all grounded in TI's SNLS231P production data sheet (Rev. AUGUST 2024).
Technical Context
The DS90UR124QVS/NOPB implements embedded-clock FPD-Link II LVDS reception with DC-balanced encoding, enabling AC-coupled transmission over lossy cables. Its PLL-based clock recovery locks to incoming serial data without a REFCLK, and internal 27 LSFR randomization eliminates spectral peaks while maintaining backward compatibility with DS90C241.
It features three independent LVCMOS output groups (ROUT[7:0], [15:8], [23:16]) with programmable Progressive Turn-On (PTO) timing via PTOSEL to reduce simultaneous switching noise. Output slew rate (SLEW) and drive strength (VODSEL on serializer side only) are configurable, and @Speed BIST validates link integrity using PASS/LOCK/BISTEN pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Pixel Clock Range | 5 MHz to 43 MHz - supports QVGA to WVGA automotive displays with precise timing alignment across full operating range. |
| Operating Temperature | −40°C to +105°C - qualified for under-hood and dashboard-mounted infotainment and instrument cluster applications. |
| Supply Voltage | 3.3 V ±10% - compatible with standard automotive LDO rails; separate analog/digital VDD pins enable noise isolation. |
| ESD Rating (HBM) | ≥±8 kV - meets ISO 10605 and AEC-Q100-002 requirements for robustness in vehicle assembly and service environments. |
| LVDS Input Threshold | ±50 mV differential - ensures reliable signal detection despite common-mode noise on long cable runs. |
| Deserializer Delay | [5+(5/56)]T + 3.7 ns to [5+(5/56)]T + 8 ns - deterministic latency critical for real-time video synchronization in ADAS and HUD systems. |
| Power-Down Current | 50 µA - enables ultra-low-power sleep mode during display blanking or system standby without losing PLL lock state. |
Pinout & Package
DS90UR124QVS/NOPB uses a 64-pin TQFP (PAG package), 10.00 mm × 10.00 mm body size, with exposed thermal pad (not electrically connected). Pin functions are validated per TI SNLS231P Rev. AUGUST 2024, Table 4-2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RIN+, RIN− | LVDS differential input pair | AC-coupled inputs terminated internally at 100 Ω; accept serialized FPD-Link II stream with embedded clock and DC balance. |
| ROUT[23:0] | 24-bit LVCMOS parallel output bus | Grouped into three 8-bit banks (Groups 1–3); timing staggered via PTOSEL to minimize ground bounce and EMI. |
| RCLK | Recovered parallel clock output | Edge-aligned to ROUT data; polarity set by RRFB; used as strobe for downstream display controller or FPGA logic. |
| LOCK | PLL lock status indicator | Active-high open-drain output; asserts HIGH only when PLL is locked and valid data is available on ROUT/RCLK. |
| RPWDNB | Receiver power-down control | Active-low enable; places ROUT/RCLK/LOCK in tri-state and shuts down PLL to reduce current to 50 µA. |
| REN | Receiver data enable | Active-high; enables ROUT/RCLK outputs while keeping PLL active - useful for blanking without re-locking. |
| RRFB | Output clock edge select | Configures RCLK edge (rising/falling) to match host processor timing requirements without PCB redesign. |
| BISTEN, BISTM, PASS | @Speed BIST control/status | Enable link-level functional test; PASS = HIGH confirms <1×10⁻⁹ bit error rate across full-speed operation. |
Key Features
| Feature | Design Value |
|---|---|
| Embedded clock recovery | Eliminates need for separate REFCLK routing - reduces PCB layer count and EMI susceptibility in tight automotive layouts. |
| Progressive Turn-On (PTO) | Staggers 24-bit output group transitions by ±1–2 UI to cut peak ICC and radiated emissions by >10 dB compared to synchronous switching. |
| DC-balanced encoding | Enables AC coupling over long cables (up to 10 m) without baseline wander - essential for flexible harness routing in vehicles. |
| AEC-Q100 Grade 2 qualification | Validated for operation at 105°C ambient - supports placement behind displays or near heat sources without derating. |
| @Speed BIST | Validates end-to-end LVDS path integrity at full operational speed (43 MHz), including cable and connector performance. |
Applications
| Automotive Instrument Cluster Display | Central Infotainment Display (CID) |
|---|---|
Use Scenario: High-reliability graphical display behind driver's steering wheel, subject to vibration, temperature cycling, and EMI from adjacent ECUs. IC Role / Device Role / Timing Role: Deserializes FPD-Link II video stream from graphics processor to drive TFT LCD with RGB666 timing and DE/HS/VS sync signals. Use Value: AEC-Q100 Grade 2 rating and ±8 kV HBM ESD ensure uninterrupted operation over 15-year vehicle lifetime; PTO reduces jitter-sensitive timing skew. |
Use Scenario: 7–10 inch touchscreen display in center console, requiring high-bandwidth video transport across 1–3 m cable harness. IC Role / Device Role / Timing Role: Receives serialized video over shielded twisted pair and reconstructs parallel RGB + control signals for display controller ASIC. Use Value: 10 m cable drive capability and AC-coupled interface simplify harness design; LOCK pin enables fail-safe display blanking on loss of signal. |
| Heads-Up Display (HUD) | Remote Camera Video Interface |
Use Scenario: Compact optical projection unit mounted near windshield, demanding low EMI and deterministic latency. IC Role / Device Role / Timing Role: Converts serialized video to precise parallel timing for DMD or LCoS microdisplay driver with sub-ns jitter tolerance. Use Value: Deterministic deserializer delay ([5+(5/56)]T + 3.7 ns) and 0.25 UI input tolerance ensure stable image registration under dynamic lighting conditions. |
Use Scenario: Rearview or surround-view camera module transmitting uncompressed video to domain controller over extended cable run. IC Role / Device Role / Timing Role: Recovers clock and data from long-distance FPD-Link II link; provides BIST validation after vehicle wash or thermal shock. Use Value: @Speed BIST pass/fail flag (PASS pin) enables automated post-boot diagnostics; hot-plug support allows live camera replacement without system reset. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link II deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UR124AQVS/NOPB | Enhanced version with improved jitter tolerance (RxIN_TOL ±0.25 UI maintained up to 43 MHz) and tighter VOD matching (ΔVOD ≤ 15 mV). | Preferred for new designs targeting 43 MHz full-rate operation with marginal cable loss or high EMI environments. | Select DS90UR124AQVS/NOPB if system-level eye diagram margin is <15% at 43 MHz; otherwise DS90UR124QVS/NOPB remains fully qualified. |
| DS90UB925QVS/NOPB | FPD-Link III deserializer with bidirectional control channel, higher bandwidth (up to 85 MHz), and integrated GPIOs - not pin-compatible. | Required for next-gen displays needing >43 MHz pixel clocks or I²C register access over same cable. | Choose DS90UB925QVS/NOPB only when upgrading to FPD-Link III ecosystem; migration requires PCB and firmware changes. |
Compared with DS90UR124AQVS/NOPB, the DS90UR124QVS/NOPB offers identical pinout and core functionality but slightly relaxed jitter specs - sufficient for most 43 MHz automotive displays. Against DS90UB925QVS/NOPB, it provides lower-cost, drop-in compatibility with legacy FPD-Link II serializers like DS90UR241, avoiding protocol conversion overhead.
Availability
DS90UR124QVS/NOPB is available at Aetrix Electronics and suitable for automotive instrument clusters, central infotainment displays, and heads-up displays requiring stable component supply across extended production lifecycles.
Supply support for DS90UR124QVS/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive electronics, with decades of experience in high-reliability interface solutions.
The DS90URxxx-Q1 product line was designed specifically for automotive display interconnect - delivering robust, low-EMI, AEC-Q100-qualified FPD-Link II serialization/deserialization for safety-critical cockpit systems.
FAQ
What is the maximum supported cable length for DS90UR124QVS/NOPB?
The DS90UR124QVS/NOPB is specified to reliably drive up to 10 meters of shielded twisted-pair cable at 43 MHz, leveraging pre-emphasis (on serializer side), DC-balanced encoding, and robust LVDS receiver thresholds. Performance beyond 10 m depends on cable quality, termination, and noise environment - TI recommends validating with actual harness in target EMI conditions.
Does DS90UR124QVS/NOPB require an external reference clock?
No, DS90UR124QVS/NOPB does not require an external reference clock. It performs full clock recovery from the embedded clock within the FPD-Link II LVDS serial stream, eliminating REFCLK routing and associated jitter and layout complexity - a key advantage over parallel clock architectures.
How is backward compatibility with DS90C241/DS90C124 implemented in DS90UR124QVS/NOPB?
Backward compatibility is enabled via the RAOFF pin: when pulled HIGH, DS90UR124QVS/NOPB disables its enhanced 27 LSFR randomizer and reverts to the legacy scrambling pattern used by DS90C241/DS90C124, ensuring interoperability without modifying the serializer side.
What is the function of the PTOSEL pin on DS90UR124QVS/NOPB?
The PTOSEL pin configures Progressive Turn-On behavior for the 24-bit LVCMOS outputs: HIGH selects grouped switching (three 8-bit banks staggered ±1–2 UI), LOW enables spread-mode timing across all bits. This reduces simultaneous switching noise and improves EMI profile without altering data validity windows.
Can DS90UR124QVS/NOPB be used in non-automotive applications?
Yes - while AEC-Q100 Grade 2 qualified and optimized for automotive, DS90UR124QVS/NOPB operates across −40°C to +105°C with robust ESD and noise immunity, making it suitable for industrial HMIs, medical displays, and aerospace avionics where high-reliability serial video transport is required.
DS90UR124QVS/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-TQFP
- Packaging:
- Tray
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- 1.03Gbps
- Input Type:
- FPD-Link II, LVDS
- Output Type:
- LVCMOS
- Number of Inputs:
- 1
- Number of Outputs:
- 24
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-TQFP (10x10)
DS90UR124QVS/NOPB FAQ
1.How can I place an order for DS90UR124QVS/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UR124QVS/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UR124QVS/NOPB reliable?
The price and inventory of DS90UR124QVS/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UR124QVS/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UR124QVS/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UR124QVS/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UR124QVS/NOPB?
DS90UR124QVS/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UR124QVS/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UR124QVS/NOPB?
For technical support, including DS90UR124QVS/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UR124QVS/NOPB requirements.
6.How does Aetrix verify that DS90UR124QVS/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UR124QVS/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UR124QVS/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UR124QVS/NOPB?
All DS90UR124QVS/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UR124QVS/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UR124QVS/NOPB part is unused and in its original packaging.
Return procedure for DS90UR124QVS/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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