Texas Instruments DS90UR903QSQE/NOPB

Overview

DS90UR903QSQE/NOPB from Texas Instruments is an automotive-grade FPD-Link II serializer IC that converts 21-bit parallel RGB666 + HS/VS/DE video data into a single high-speed CML serial stream for transmission over one differential pair. It supports 10–43 MHz PCLK, delivers up to 903 Mbps throughput, embeds clock via DC-balanced coding, and operates from a single 1.8 V supply. It targets central information displays and navigation systems in vehicles.

For engineers reviewing the DS90UR903QSQE/NOPB datasheet, DS90UR903QSQE/NOPB pinout, DS90UR903QSQE/NOPB application, or DS90UR903QSQE/NOPB equivalent, key selection criteria include its 40-pin WQFN package, I²C-configurable PLL, LOCK status reporting, integrated CML termination, and AEC-Q100 Grade 2 qualification for automotive display interconnects.

Technical Context

The DS90UR903QSQE/NOPB implements a fully integrated PLL-based serializer with embedded clock recovery and DC-balanced 8b/10b-like encoding to enable AC-coupled transmission over shielded twisted-pair cables up to 10 meters. Its CML output driver provides 268–412 mV differential voltage with 80–120 Ω internal termination and supports programmable equalization on the companion deserializer.

It features dual-supply LVCMOS I/O (1.8 V or 3.3 V compatible), hardware MODE pin for I²C enable, dedicated PDB for power-down control, and a LOCK-synchronized parallel-to-serial conversion pipeline synchronized to PCLK edge (configurable rising/falling). No external reference clock is required at the deserializer side.

Key Specifications

Pinout & Package

DS90UR903QSQE/NOPB uses a 40-pin WQFN (RTA) package with 0.5 mm pitch and exposed thermal pad (DAP = GND). The package supports automated optical inspection and efficient thermal dissipation in automotive environments.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar FPD-Link II serializer applications.

Compared with DS90UR905QSQE/NOPB and MAX9270GTJ+T, DS90UR903QSQE/NOPB offers optimal cost and power efficiency for 18-bit automotive displays at ≤43 MHz, with full I²C configurability and minimal BOM impact due to integrated termination.

Availability

DS90UR903QSQE/NOPB is available at Aetrix Electronics and suitable for automotive display systems, central information clusters, and navigation units requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for DS90UR903QSQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for automotive, industrial, and consumer markets.

DS90UR903QSQE/NOPB belongs to TI's FPD-Link II automotive serializer family, designed specifically to replace bulky parallel RGB interfaces in vehicle displays while meeting AEC-Q100 reliability and EMI standards.

FAQ

What is the primary function of the DS90UR903QSQE/NOPB in an automotive display system?

The DS90UR903QSQE/NOPB functions as an FPD-Link II serializer that converts 21-bit parallel video data (RGB666 + HS/VS/DE) into a single high-speed CML serial stream for transmission over one differential pair. In automotive systems, it bridges the graphics controller to the display module, enabling compact, low-EMI cabling. DS90UR903QSQE/NOPB supports 10–43 MHz pixel clocks and integrates PLL, DC-balanced encoding, and CML drivers-all within its AEC-Q100 Grade 2 qualified 40-pin WQFN package.

Does the DS90UR903QSQE/NOPB require an external reference clock for operation?

No, the DS90UR903QSQE/NOPB does not require an external reference clock. Its internal PLL locks directly to the incoming PCLK signal (10–43 MHz), generating the high-speed serial bit clock needed for CML transmission. This eliminates the need for additional clock sources or distribution circuitry on the board. DS90UR903QSQE/NOPB relies solely on the pixel clock input for synchronization and does not accept or use any auxiliary reference clock input.

How is the DS90UR903QSQE/NOPB configured during system startup?

The DS90UR903QSQE/NOPB is configured via its I²C-compatible serial control bus (SCL/SDA pins), with the MODE pin held HIGH to enable I²C mode. Configuration registers-including PCLK edge polarity, PLL settings, and power modes-are written after power-up sequencing completes. DS90UR903QSQE/NOPB retains no state in power-down (PDB = LOW); all registers reset to defaults. External pull-up resistors on SCL/SDA and proper VDDIO decoupling are mandatory for reliable initialization.

What is the role of the LOCK pin on the DS90UR903QSQE/NOPB?

The LOCK pin on the DS90UR903QSQE/NOPB is an open-drain LVCMOS output that asserts HIGH when the internal PLL achieves frequency and phase lock to the PCLK input. It serves as a hardware link-status indicator for the host controller, enabling real-time validation of serializer readiness before enabling video transmission. DS90UR903QSQE/NOPB does not drive LOCK during power-down (PDB = LOW), and the pin remains inactive until PLL lock is confirmed post-power-up or wake-up.

Can the DS90UR903QSQE/NOPB interface directly with both 1.8 V and 3.3 V logic systems?

Yes, the DS90UR903QSQE/NOPB supports dual-voltage LVCMOS I/O: its VDDIO pin accepts either 1.8 V ±5% or 3.3 V ±10%, powering DIN[20:0], PCLK, SCL, SDA, MODE, and PDB. Input thresholds scale accordingly (e.g., VIH = 0.65×VDDIO for 1.8 V, 0.7×VDDIO for 3.3 V), and output drive strength is specified for both rails. DS90UR903QSQE/NOPB requires separate 1.8 V supplies for VDDPLL, VDDT, VDDCML, and VDDD-these are not 3.3 V tolerant.