Texas Instruments DS99R104TVS/NOPB

Overview

DS99R104TVS/NOPB from Texas Instruments is a 24-bit LVDS deserializer that recovers embedded clock and parallel data from a single serial LVDS stream over shielded twisted-pair cable, operating at 3–40 MHz (72–960 Mbps), with integrated 100Ω receiver termination, 4 mA LVCMOS output drive, and LOCK status flag. It serves as the receiver in a bidirectional SerDes chipset paired with DS99R103 for high-noise-immunity video/data transmission in automotive displays and industrial imaging systems.

For engineers reviewing the DS99R104TVS/NOPB datasheet, DS99R104TVS/NOPB pinout, DS99R104TVS/NOPB application, or DS99R104TVS/NOPB equivalent, key selection criteria include its DC-balanced decode capability for AC-coupled links, programmable clock edge alignment (RRFB), RCLK/RDATA timing margin compliance (±0.25 UI input tolerance), and support for live-pluggable operation via RDL coding - all critical for robust serial link design in EMI-sensitive environments.

Technical Context

The DS99R104TVS/NOPB implements a fully integrated CDR (Clock and Data Recovery) architecture with no external reference clock required; it extracts timing directly from the incoming LVDS serial stream using adaptive phase detection and pattern-independent lock acquisition. Its internal PLL locks to the embedded clock within 5–50 ms across 3–40 MHz, validated by RDL (Random Data Lock) coding and real-time LOCK flag assertion synchronized to valid output data.

It features three independent LVCMOS output groups (ROUT[7:0], [15:8], [23:16]) with progressive turn-on (PTO) to minimize SSO effects, balanced setup/hold margins relative to RCLK (tROS/tROH = 0.4×tRCP to 0.5×tRCP), and on-chip filters for PLL stability. The receiver supports user-selectable rising/falling edge sampling via RRFB and includes integrated 100Ω differential termination on RIN+/RIN−.

Key Specifications

Pinout & Package

DS99R104TVS/NOPB is housed in a 48-pin WQFN package (TI package code NJU0048D), 7.0 mm × 7.0 mm × 0.8 mm, thermally enhanced with exposed thermal pad. Pin assignments are identical for WQFN and TQFP variants per TI SNLS241D Rev. D.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS deserializer applications.

Compared with DS99R104TVS/NOPB, DS90CR288AMTDX/NOPB offers higher throughput but demands more layout effort and lacks built-in lock validation, while SN65LVDS32PW omits deserialization entirely - making DS99R104TVS/NOPB uniquely suited for self-contained, AC-coupled, plug-and-lock 24-bit link implementations.

Availability

DS99R104TVS/NOPB is available at Aetrix Electronics and suitable for automotive display modules, industrial machine vision systems, medical imaging equipment, and avionics video distribution requiring stable component supply across extended temperature and long-lifecycle programs.

Supply support for DS99R104TVS/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in high-speed interface solutions for automotive, industrial, and communications markets.

The DS99R104TVS/NOPB belongs to TI's LVDS SerDes chipset family, designed specifically to replace bulky parallel buses with robust, low-EMI serial links in noise-sensitive applications such as automotive infotainment and industrial imaging.

FAQ

What is the primary function of DS99R104TVS/NOPB in a SerDes link?

The DS99R104TVS/NOPB functions as the deserializer in a bidirectional LVDS SerDes pair, recovering embedded clock and converting a 24-bit serial LVDS stream back into parallel LVCMOS data and RCLK. It operates without an external reference clock, relying on its integrated CDR circuit to lock to the incoming serial data - a core capability confirmed in TI's SNLS241D datasheet Section 1 and Functional Description.

Does DS99R104TVS/NOPB require external termination resistors on its LVDS inputs?

No, DS99R104TVS/NOPB includes integrated 100 Ω differential termination on RIN+/RIN− pins, eliminating the need for external resistors. This is explicitly stated in the "Features" list and Electrical Characteristics table (RT = 90–130 Ω) of the SNLS241D datasheet, simplifying PCB layout and improving impedance matching consistency.

How does the LOCK output of DS99R104TVS/NOPB indicate data validity?

The LOCK output of DS99R104TVS/NOPB goes high only after the internal CDR achieves stable lock to the embedded clock and valid RCLK/ROUT data appears at the outputs - it is synchronous to the first stable output edge. This behavior is documented in the Functional Description and Pin Descriptions sections of SNLS241D, making LOCK a hardware-validated data integrity signal.

Can DS99R104TVS/NOPB operate with random data patterns without special training sequences?

Yes, DS99R104TVS/NOPB implements RDL (Random Data Lock) functionality, enabling it to acquire CDR lock on arbitrary, non-repetitive data streams without requiring idle periods or predefined training patterns. This is verified in the Initialization and Locking Mechanism section of SNLS241D, confirming true plug-and-lock behavior.

What package options are available for DS99R104TVS/NOPB, and is the pinout identical across them?

DS99R104TVS/NOPB is offered in both 48-pin WQFN (NJU0048D) and 48-pin TQFP (PFB0048A) packages, and the pinout is identical between them per Figure 18 and Pin Descriptions in SNLS241D. Both packages share the same electrical functionality and thermal characteristics, allowing drop-in substitution based on board assembly requirements.