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STMicroelectronics E-L6919ETR

Part No.:
E-L6919ETR
Manufacturer:
STMicroelectronics
Category:
DC DC Switching Controllers
Package:
28-SOIC (0.295", 7.50mm Width)
Datasheet:
AetrixE-L6919ETR.pdf
Description:
IC REG CTRLR BUCK 28SOIC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:973

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Product details

Overview

E-L6919ETR from STMicroelectronics is a dual-phase synchronous buck controller IC designed for high-current microprocessor power delivery. It delivers 5-bit programmable output voltage (0.800–1.550 V, 25 mV steps), ±0.6% output accuracy, and 10% active current sharing accuracy across two 180° phase-shifted channels. Integrated 2 A high-side/1.8 A low-side gate drivers enable fast switching with adaptive anti-cross-conduction control, supporting server and workstation CPU VRMs.

For engineers reviewing the E-L6919ETR datasheet, E-L6919ETR pinout, E-L6919ETR application, or E-L6919ETR equivalent, key selection considerations include dynamic VID transition capability, differential remote sensing (FBR/FBG), dual-channel OCP using RDS(on) or sense resistors, and externally adjustable 150 kHz oscillator (doubled to 300 kHz at load).

Technical Context

The E-L6919ETR implements average current-mode control with dual-phase interleaving and 180° phase shift to reduce input/output ripple and improve transient response. Its error amplifier features 15 V/µs slew rate and 80 dB DC gain, enabling high-bandwidth regulation for microprocessor load steps.

It supports dynamic on-the-fly VID code changes-stepping output voltage in 25 mV increments per clock cycle-with PGOOD masked during transition while OVP/UVP remain active. Protection includes crowbar-based overvoltage shutdown (turning on low-side MOSFET), constant-current mode overcurrent response, and programmable soft-start (2048-step digital ramp).

Key Specifications

Parameter Value and Actual Design Meaning
Topology Dual-phase synchronous buck with 180° phase shift - reduces input capacitor RMS current and improves thermal distribution.
Output Voltage Range 0.800 V to 1.550 V in 25 mV binary steps via VID0–VID4 - matches Intel Hammer-era CPU voltage requirements without external offset resistors.
Output Accuracy ±0.6% over line, load, and temperature - ensures stable core voltage under varying CPU operating conditions.
Current Sharing Accuracy ±10% between phases - maintains balanced thermal loading and extends MOSFET lifetime in high-power VRMs.
Oscillator Frequency 150 kHz per phase (300 kHz effective at output) - adjustable via OSC pin current (6 kHz/µA gain); fixed internal reference at 1.237 V.
Gate Drive Capability 2 A high-side source / 1.5 Ω sink; 1.8 A low-side source / 1.1 Ω sink - drives multiple paralleled N-MOSFETs with minimal external components.
Protection Features OVP (2.05 V threshold), UVP (60% of setpoint), PGOOD window (88–112%), and constant-current OCP - latches on UVP, crowbars on OVP.

Pinout & Package

Package: SO-28 (Small Outline, 28-pin, 300 mil width), surface-mount, RoHS-compliant.

Pin/Terminal Circuit Role Design Meaning
LGATE1 / LGATE2 Low-side gate driver outputs Drive N-channel MOSFET sources; require series resistor to damp ringing and limit peak current.
UGATE1 / UGATE2 High-side gate driver outputs Drive N-channel MOSFET gates referenced to PHASEx; bootstrapped supply required via BOOTx.
PHASE1 / PHASE2 High-side driver return paths Connect directly to HS MOSFET source pins - forms local return for high-side drivers and enables accurate RDS(on) sensing.
BOOT1 / BOOT2 High-side floating supply inputs Charge-pump supply for HS drivers; connect 100 nF capacitor to PHASEx and diode to VCC (cathode to BOOT).
VCCDR Low-side driver supply Separate 5–12 V supply for LS drivers - decoupled with ≥1 µF ceramic cap to PGND for noise immunity.
ISEN1 / ISEN2 Differential current sense inputs Accept sensing across LS MOSFET RDS(on) or external resistor; routed adjacent to PGNDSx to reject common-mode noise.
FBR / FBG Remote sense buffer inputs FBR = positive load side, FBG = negative load side - enables Kelvin sensing to compensate PCB IR drop.
VID0–VID4 5-bit TTL-compatible voltage ID inputs Logic '0' = grounded, '1' = floating (5 µA internal pull-up); configure output voltage and PGOOD/OVP thresholds per Table 1.
OSC/INH/FAULT Frequency programming / inhibit / fault status Set frequency via ROSC to GND/VCC; <0.6 V = inhibit; >4.75 V = OVP/UVP fault latch requiring VCC cycle.
PGOOD Open-collector power-good indicator Pulled low during soft-start or if VOUT outside 88–112% window - requires external pull-up to ≤5 V.

Key Features

Feature Design Value
Dual-phase interleaved control 180° phase shift reduces input capacitor RMS current by ~30% and cuts output inductor size vs. single-phase design.
Digital 2048-step soft-start Programmable ramp prevents inrush current and ensures monotonic VOUT rise - eliminates need for external timing components.
Dynamic VID management On-the-fly voltage transitions in 25 mV steps per PWM cycle - supports CPU DVFS without system reset or VRM reconfiguration.
Differential remote sensing FBR/FBG inputs with 40 dB CMRR and 15 V/µs slew rate - rejects PCB noise and compensates for up to 50 mV IR drop at full load.
Adaptive anti-cross-conduction 30 ns dead-time control with watchdog timer - prevents shoot-through while enabling negative inductor current recirculation.

Applications

Server CPU Power Delivery Workstation GPU Core Supply

Use Scenario: Dual-socket Xeon server motherboard delivering up to 120 A to each CPU socket under burst workloads.

IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller managing phase interleaving, current balancing, and dynamic VID scaling per CPU instruction set.

Use Value: ±10% current sharing accuracy ensures thermal uniformity across MOSFET arrays; 150 kHz base frequency enables compact magnetics while maintaining transient response.

Use Scenario: High-end workstation graphics card supplying 1.05 V @ 80 A to GPU core with rapid load transients during rendering.

IC Role / Device Role / Timing Role: Primary VRM controller implementing remote sensing, OVP crowbar protection, and 2048-step soft-start for reliable GPU initialization.

Use Value: ±0.6% output accuracy maintains GPU stability at sub-1 V; differential FBR/FBG sensing compensates for 30+ mΩ PCB trace resistance.

Distributed Point-of-Load (POL) High-Performance Computing (HPC) Node

Use Scenario: Midplane-mounted POL module converting 12 V backplane to 1.2 V @ 40 A for FPGA or ASIC cluster.

IC Role / Device Role / Timing Role: Dual-phase controller with programmable OSC frequency and independent channel OCP for modular, scalable power architecture.

Use Value: External ROSC adjustment allows tuning switching frequency to avoid EMI bands; PGNDS1/PGNDS2 routing minimizes ground bounce in multi-module systems.

Use Scenario: HPC compute node requiring simultaneous voltage scaling across CPU, memory, and accelerator domains.

IC Role / Device Role / Timing Role: Centralized VRM controller coordinating dynamic VID transitions across multiple power domains via synchronized clock domain.

Use Value: On-the-fly VID stepping enables coordinated voltage/frequency scaling (DVFS) across heterogeneous compute units without software intervention.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.

Alternative Part Technical Difference Application Difference Selection Advice
ISL6322IRZ 6-bit VID (0.6–1.75 V), 0.5% accuracy, integrated MOSFET drivers rated for 3 A peak, supports 3-phase operation. Targets newer Intel Core i-series CPUs with tighter voltage tolerances and higher current density; lacks dedicated remote sense buffer. Preferred when upgrading to post-Hammer platforms requiring finer voltage resolution and higher drive strength.
TPS51220ARUKR Single-phase only, 5-bit VID, 0.8–1.8 V range, integrated LDO for VTT, no differential remote sensing, 1.5 A gate drive. Designed for DDR memory termination (VTT) and auxiliary rails - not suitable for primary CPU core VRM due to single-phase limitation. Select only for secondary rail support; insufficient for high-current CPU core delivery where E-L6919ETR's dual-phase capability is essential.

Compared with ISL6322IRZ and TPS51220ARUKR, the E-L6919ETR uniquely combines dual-phase interleaving, dedicated FBR/FBG remote sensing, and dynamic VID stepping without external compensation - making it optimal for legacy Hammer-architecture server VRMs where precision, noise immunity, and firmware-transparent voltage transitions are critical.

Availability

E-L6919ETR is available at Aetrix Electronics and suitable for server CPU power delivery, workstation GPU core supplies, and distributed point-of-load (POL) modules requiring stable component supply and long-term industrial lifecycle support.

Supply support for E-L6919ETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, microcontrollers, and analog ICs for industrial, automotive, and computing markets.

The E-L6919ETR belongs to ST's high-performance power controller product line, engineered specifically for microprocessor voltage regulation modules (VRMs) in servers and workstations requiring precise, fast, and robust multi-phase DC/DC conversion.

FAQ

What is the maximum supported output current for E-L6919ETR?

The E-L6919ETR itself does not define a maximum output current - it is a controller IC that drives external N-channel MOSFETs. System-level current is determined by MOSFET selection, layout, thermal design, and inductor rating. Typical implementations deliver 60–120 A per phase using paralleled MOSFETs and optimized PCB copper layers.

Can E-L6919ETR operate with only one phase enabled?

No - the E-L6919ETR is designed exclusively for dual-phase operation with mandatory 180° phase shift. Both channels must be populated and configured; disabling one phase is not supported in the architecture and will result in undefined behavior or failure to regulate.

How does the remote sensing (FBR/FBG) interface function electrically?

FBR and FBG form a differential input pair to an internal unity-gain buffer. FBR connects to the positive load terminal, FBG to the negative (return) terminal. The buffer drives the VSEN pin, which feeds the error amplifier and PGOOD comparator - enabling direct regulation at the load rather than at the VRM output.

Is E-L6919ETR still in active production or obsolete?

The E-L6919ETR is marked "Obsolete Product(s)" in its official STMicroelectronics datasheet (Rev. September 2003). However, Aetrix Electronics maintains legacy inventory with full traceability and offers engineering support for continued use in existing designs and maintenance programs.

E-L6919ETR Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Series:
-
Package/Case:
28-SOIC (0.295", 7.50mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Output Type:
Transistor Driver
Function:
Step-Down
Output Configuration:
Positive
Topology:
Buck
Number of Outputs:
2
Output Phases:
2
Voltage - Supply (Vcc/Vdd):
7.5V ~ 15V
Frequency - Switching:
150kHz
Duty Cycle (Max):
80%
Synchronous Rectifier:
Yes
Clock Sync:
No
Serial Interfaces:
-
Control Features:
Frequency Control, Phase Control, Power Good
Operating Temperature:
0°C ~ 125°C (TJ)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
28-SO

E-L6919ETR FAQ

1.How can I place an order for E-L6919ETR through Aetrix?

Please submit a Request for Quotation (RFQ) for E-L6919ETR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for E-L6919ETR reliable?

The price and inventory of E-L6919ETR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for E-L6919ETR is usually 5 days.

3.What payment methods are accepted for E-L6919ETR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for E-L6919ETR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for E-L6919ETR?

E-L6919ETR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your E-L6919ETR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for E-L6919ETR?

For technical support, including E-L6919ETR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your E-L6919ETR requirements.

6.How does Aetrix verify that E-L6919ETR is sourced from the original manufacturer or authorized distributors?

All E-L6919ETR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that E-L6919ETR meets industry standards.

7.What is the process for return or replacement of E-L6919ETR?

All E-L6919ETR units undergo pre-shipment inspection (PSI). If there is an issue with E-L6919ETR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The E-L6919ETR part is unused and in its original packaging.

Return procedure for E-L6919ETR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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