Monolithic Power Systems Inc. EV5098A-D-00A

Overview

EV5098A-D-00A from Monolithic Power Systems is an evaluation board designed to demonstrate the MP5098A dual eFuse IC, supporting independent 5V and 12V input rails with reverse current blocking on the 5V channel, 3A/2A output current limits, SAS-controlled sequencing, and integrated 5V/10mA LDO. It enables hot-swap protection, inrush current limiting, and short-circuit protection in storage subsystems.

For engineers reviewing the EV5098A-D-00A datasheet, EV5098A-D-00A pinout, EV5098A-D-00A application, or EV5098A-D-00A equivalent, this board provides validated reference design, startup/shutdown timing waveforms, EN/SAS/SS control interface behavior, and OVP/reverse-current test data under real load conditions.

Technical Context

The EV5098A-D-00A implements a dual-channel eFuse architecture using the MP5098AGDT IC, where Channel 1 handles 12V input (10.8–13.2V) with 3A ±10% current limit and 15V typical OVP, while Channel 2 manages 5V input (4.5–5.5V) with 2A ±10% current limit, 5.7V typical OVP, and integrated reverse current blocking.

Control logic is implemented via three dedicated pins: EN for global enable/disable, SAS for synchronized channel activation/deactivation, and separate SS1/SS2 pins for programmable soft-start timing per channel. The board integrates all required decoupling (10µF ×4, 100nF ×2, 1µF ×1) and exposes test points for VOUT1, VOUT2, VLDO, VIN1, VIN2, EN, SAS, SS1, SS2, and GND.

Key Specifications

Availability

EV5098A-D-00A is available at Aetrix Electronics and suitable for hard disk drive (HDD) power management, solid-state drive (SSD) hot-swap implementation, and industrial backplane power distribution requiring stable component supply and rapid validation of dual-rail eFuse behavior.

Supply support for EV5098A-D-00A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, including DC/DC converters, LED drivers, motor drivers, and protection devices, with global manufacturing and quality certifications.

The EV5098A-D-00A belongs to MPS's evaluation board product line, developed specifically to accelerate design-in of the MP5098A dual eFuse for storage and enterprise infrastructure applications demanding robust overcurrent, overvoltage, and reverse-current protection.

FAQ

What is the primary function of the SAS pin on the EV5098A-D-00A?

The SAS (Synchronized Activation Signal) pin controls simultaneous turn-on and turn-off of both eFuse channels. When driven high (>1.4V), it enables both channels in sequence; when pulled low (<0.4V), it disables both. This ensures coordinated power-up/down across dual-rail systems like SATA or SAS storage controllers.

Does the EV5098A-D-00A support reverse current blocking on both channels?

No. Reverse current blocking is integrated only on the 5V channel (VIN2 → VOUT2 path). The 12V channel lacks reverse-blocking capability, as confirmed by the MP5098A datasheet and board-level test results showing reverse conduction only on Channel 2 during IREVERSE sweep tests.

Can the current limit thresholds be adjusted externally?

No. Both current limits are internally fixed and trimmed during production. The MP5098A does not provide external resistor programming for I_LIM; values are 3A ±10% for Channel 1 and 2A ±10% for Channel 2, verified in board-level short-circuit and current-sweep tests.

What is the role of the SS1 and SS2 pins on this evaluation board?

SS1 and SS2 set soft-start timing independently for each channel. Pulling either pin low reduces startup slew rate to limit inrush current; leaving them open or tied high enables fastest possible turn-on. Test waveforms confirm distinct VOUT1/VOUT2 rise times based on SS pin configuration.

Is the 5V LDO output regulated and load-tested?

Yes. The integrated LDO delivers 5V ±3% at up to 10mA, verified under load with ILDO sweep tests showing stable regulation from 0–10mA with <1% dropout. C7 (1µF X5R) provides local decoupling, and VLDO is accessible at TP7 for measurement.

How is thermal shutdown implemented on this board?

The MP5098A features latch-off thermal shutdown triggered at junction temperature >150°C. On the EV5098A-D-00A, this is validated via sustained overload testing: once tripped, the device remains off until power cycle or EN/SAS reset - no auto-retry behavior observed in shutdown waveform captures.