STMicroelectronics EVAL6924D

Overview

EVAL6924D from STMicroelectronics is an evaluation board for the L6924D monolithic linear battery charger IC, designed to implement CC/CV charging for single-cell Li-Ion/Li-Polymer batteries in portable electronics. It integrates the L6924D VFQFPN16 device, input/output capacitors (C1, C2, C3, C4), current-setting resistors (R5 = 24kΩ for 500 mA fast-charge), voltage-selection jumper (J4: 4.1 V or 4.2 V), and thermal monitoring circuitry with NTC support.

For engineers reviewing the EVAL6924D datasheet, EVAL6924D pinout, EVAL6924D application, or EVAL6924D equivalent, this board enables rapid validation of L6924D-based charging systems-including programmable pre-charge thresholds (VPRETH/IPRETH), end-of-charge detection (IEND), thermal regulation (TH pin), gas gauge functionality (voltage across R4), and host-controlled timer reset (J5 edge-triggered).

Technical Context

The EVAL6924D implements a complete reference design for the L6924D IC, supporting both linear mode (with regulated wall adapter) and quasi-pulse mode (with current-limited adapter) to minimize power dissipation. Input voltage range is 2.5 V to 12 V, output voltage selectable between 4.1 V and 4.2 V via J4, and fast-charge current fixed at 500 mA by R5 (24 kΩ).

It provides diagnostic open-collector outputs (ST1/ST2) for LED indication or microcontroller interface, thermal foldback via TH pin with optional NTC network (R9, R3), and charge termination control using R4 (10 kΩ nominal, used for both IEND threshold and gas gauge voltage sensing). The board includes TMAX timing capacitor C2 (10 nF) setting maximum charge time.

Key Specifications

Availability

EVAL6924D is available at Aetrix Electronics and suitable for PDA battery management validation, handheld device charging system prototyping, and digital camera power subsystem development requiring stable component supply and documented reference design fidelity.

Supply support for EVAL6924D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, power, and analog/mixed-signal solutions.

The EVAL6924D belongs to ST's battery management evaluation platform family, developed to accelerate adoption of its monolithic linear chargers-specifically targeting space-constrained portable applications where integration, thermal safety, and programmable CC/CV control are critical.

FAQ

What is the purpose of jumper J4 on the EVAL6924D?

J4 selects the final charge voltage: position A sets 4.2 V for standard Li-ion cells, position B sets 4.1 V for Li-polymer cells. This hardware configuration directly determines the L6924D's VREF-based voltage regulation target and must match the connected battery's specification to avoid overcharging or undercharging.

How is the end-of-charge current threshold configured on this board?

The end-of-charge current threshold is set by resistor R4 (10 kΩ nominal), which connects between IEND and GND. Its value determines the current level at which charging terminates (e.g., ~10% of fast-charge current), and the voltage across R4 is also used as a real-time gas gauge signal for host microcontroller readback.

Can the EVAL6924D operate without an NTC thermistor?

Yes - R9 (470 Ω) is installed to bias the TH pin into the valid voltage window when no NTC is present. This maintains thermal monitoring functionality using a fixed-resistor divider (R3 + R9), enabling basic overtemperature protection without external thermistor calibration.

What triggers the charge timer reset function on the EVAL6924D?

Closing jumper J5 applies a falling edge to the L6924D's TMR pin, resetting the internal charge timer. This allows manual restart of the charging cycle after fault conditions (e.g., timeout or thermal shutdown), and is implemented via a short-circuit between TMR and GND through J5.