Analog Devices Inc. EVAL-ADF7023-JDB3Z

Overview

EVAL-ADF7023-JDB3Z from Analog Devices is an evaluation board for the ADF7023-J ISM-band FSK/GFSK/MSK/GMSK transceiver IC, supporting 902–958 MHz operation, data rates from 1 kbps to 300 kbps, and ultra-low-power PHY_SLEEP mode (0.33 µA), used in smart metering and IEEE 802.15.4g wireless sensor node development.

For engineers reviewing the EVAL-ADF7023-JDB3Z datasheet, EVAL-ADF7023-JDB3Z pinout, EVAL-ADF7023-JDB3Z application, or EVAL-ADF7023-JDB3Z equivalent, this board enables rapid validation of RF performance, packet handling, AES encryption, smart wake mode, and SPI interface timing with the ADF7023-J transceiver under real-world supply, temperature, and antenna-matching conditions.

Technical Context

The EVAL-ADF7023-JDB3Z implements the full reference design for the ADF7023-J transceiver, including matched single-ended RF front-end with 50 Ω SMA connector, integrated 26 MHz crystal oscillator, 32.768 kHz RTC crystal, LDO-regulated 3.3 V supply rails, and configurable GPIO header for host processor interfacing via SPI (SCLK/MOSI/MISO/CS) and interrupt (IRQ_GP3).

It supports all ADF7023-J low-power modes-including Deep Sleep Mode 1 (0.33 µA), Smart Wake Mode with autonomous carrier sense and packet sniffing-and provides access to on-chip peripherals: 8-bit ADC, temperature sensor, battery monitor, and AES/Reed-Solomon firmware module execution via downloadable program RAM.

Key Specifications

Availability

EVAL-ADF7023-JDB3Z is available at Aetrix Electronics and suitable for smart metering, industrial wireless sensor networks (WSNs), and IEEE 802.15.4g protocol stack development requiring stable component supply, traceable calibration, and repeatable RF characterization.

Supply support for EVAL-ADF7023-JDB3Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with deep expertise in RF, precision sensing, and power management.

The EVAL-ADF7023-JDB3Z belongs to Analog Devices' RF transceiver evaluation platform family, designed specifically to accelerate development of battery-powered, sub-GHz wireless systems compliant with ARIB T96 and IEEE 802.15.4g standards.

FAQ

What is the primary function of the EVAL-ADF7023-JDB3Z?

The EVAL-ADF7023-JDB3Z is an evaluation board for the ADF7023-J transceiver IC. It provides a fully assembled, tested, and calibrated hardware platform to validate RF performance, SPI communication, low-power modes, packet handling, and firmware module execution-enabling rapid prototyping of 902–958 MHz wireless sensor nodes without custom PCB design. The EVAL-ADF7023-JDB3Z includes all necessary clocks, power regulation, and RF matching per the ADF7023-J datasheet recommendations.

Does the EVAL-ADF7023-JDB3Z support both single-ended and differential PA configurations?

No-the EVAL-ADF7023-JDB3Z implements only the single-ended RF path (RFIO_1P/RFIO_1N) as specified in the ADF7023-J reference design, with an SMA connector and 50 Ω matching network. It does not include differential PA routing or RFO2 connections. Users requiring differential PA evaluation must refer to the ADF7023-J datasheet layout guidelines and implement custom board routing; the EVAL-ADF7023-JDB3Z is optimized for single-ended deployment per ARIB T96 and IEEE 802.15.4g use cases.

Can the EVAL-ADF7023-JDB3Z be used to verify AES-128/192/256 encryption functionality?

Yes-the EVAL-ADF7023-JDB3Z supports full execution of the downloadable AES firmware module on the ADF7023-J's on-chip 8-bit RISC processor. When loaded into program RAM, the AES engine performs hardware-accelerated 128-bit block encryption/decryption with key sizes up to 256 bits (ECB and CBC Mode 1). The board provides direct SPI access and debug headers to configure, trigger, and verify encrypted payload transmission and reception using the ADF7023-J's packet RAM and interrupt system.

What clock sources are included on the EVAL-ADF7023-JDB3Z?

The EVAL-ADF7023-JDB3Z includes two precision clock sources: a 26 MHz parallel-load resonant crystal (XOSC26P/XOSC26N) for main RF synthesizer and digital timing, and a 32.768 kHz crystal (XOSC32KP/XOSC32KN) for the wake-up timer and RTC functions. Both crystals meet ADF7023-J load capacitance (7–18 pF) and ESR (<1800 Ω) specifications, enabling accurate calibration of AFC, VCO settling, and Smart Wake Mode timing without external oscillators.

How does the EVAL-ADF7023-JDB3Z support low-power mode validation?

The EVAL-ADF7023-JDB3Z provides dedicated test points and jumper-selectable power domains to directly measure ADF7023-J supply current in all defined low-power states: PHY_SLEEP (0.33 µA Deep Sleep Mode 1), PHY_RX (11.9–12.8 mA), and PHY_TX (24.1 mA at +10 dBm). It implements the exact biasing, decoupling, and clock-gating schemes described in the ADF7023-J datasheet, allowing engineers to correlate measured current against published specifications under controlled thermal and supply conditions.