STMicroelectronics EVALSTGAP2HDM

Overview

EVALSTGAP2HDM from STMicroelectronics is a half-bridge evaluation board designed to validate the STGAP2HDM isolated dual gate driver IC. It supports high-voltage operation up to 1200 V, delivers ±4 A peak gate drive current, and integrates isolated DC-DC converters (5.2 kV isolation) for independent high-side/low-side supply. The board enables configurable gate driving voltages (+15/0 V, +15/−3 V, +19/0 V, +19/−3 V) and targets industrial motor drives using TO-220/TO-247 IGBTs or MOSFETs.

For engineers reviewing the EVALSTGAP2HDM datasheet, EVALSTGAP2HDM pinout, EVALSTGAP2HDM application, or EVALSTGAP2HDM equivalent, this board provides direct access to STGAP2HDM's negative gate driving capability, interlocking logic, UVLO, thermal shutdown, and 75 ns propagation delay under real half-bridge switching conditions with 1200 V rail voltage.

Technical Context

The board implements a galvanically isolated half-bridge gate driver stage centered on the STGAP2HDM SO36-W IC, which features independent high-side and low-side output channels with rail-to-rail drive, 4 A source/sink capability, and dedicated SD/BRAKE pins. Its on-board Murata MGJ2D051509SC DC-DC converters supply isolated 15 V or 19 V gate drive rails from a single 5 V VAUX input.

Design-level configuration is enabled via jumpers (JP3, JP6, JP16) to select gate voltage polarity and amplitude, while test points (TP1–TP21), external component footprints (R1–R20, C1–C30), and dual power switch footprints (Q1/Q2 in TO-247, Q1A/Q2A in TO-220) support empirical tuning of dead time, Miller clamping, and EMI filtering under varying load and voltage conditions.

Key Specifications

Availability

EVALSTGAP2HDM is available at Aetrix Electronics and suitable for industrial motor control validation, high-voltage power converter prototyping, and IGBT gate driver qualification requiring stable component supply and traceable sourcing.

Supply support for EVALSTGAP2HDM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog/mixed-signal components for automotive, industrial, and consumer markets.

EVALSTGAP2HDM belongs to ST's Power Transistor Driver Evaluation Platform family, developed specifically to accelerate design-in of isolated gate drivers in high-reliability industrial motor drives and renewable energy inverters.

FAQ

What power switches can be evaluated with EVALSTGAP2HDM?

The board supports TO-220 and TO-247 packaged N-channel IGBTs or MOSFETs rated up to 1700 V, including devices like STGW40H65DFB or STW48N60M2. Footprints accept both through-hole and surface-mount variants, and external gate resistors (R1–R20) allow empirical optimization of switching speed and oscillation damping.

How is isolated gate supply implemented on this board?

Two Murata MGJ2D051509SC isolated DC-DC converters generate independent high-side and low-side gate drive rails from a single 5 V VAUX input. Each converter provides 5.2 kV DC reinforced isolation and outputs ±15 V or ±19 V depending on jumper configuration (JP16), eliminating need for external isolated supplies.

Does EVALSTGAP2HDM support negative gate driving?

Yes - the board enables true negative gate driving (e.g., +15 V / −3 V) via jumper-selectable configurations (JP3, JP6). This improves Miller immunity during high dv/dt commutation events and is critical for reliable operation with SiC MOSFETs or fast IGBTs in hard-switched topologies.

Can interlocking and brake functions be tested independently?

Yes - dedicated SD (shutdown) and BRAKE pins are brought out to headers CN1/CN2 and accessible via test points TP12/TP13. Interlocking logic is internal to STGAP2HDM and prevents simultaneous high-side/low-side conduction; BRAKE forces both outputs low regardless of input states, verified via oscilloscope monitoring of GON_A/GON_B.