STMicroelectronics EVALSTGAP2SICS

Overview

EVALSTGAP2SiCS from STMicroelectronics is a demonstration board for the STGAP2SiCS isolated single gate driver, designed to evaluate high-voltage SiC MOSFET half-bridge operation up to 1200 V. It integrates dual onboard isolated DC-DC converters (5.2 kV isolation), supports configurable gate drive voltages (+17/0 V, +17/−3 V, +19/0 V, +19/−3 V), and provides 3.3 V or 5 V logic supply options.

For engineers reviewing the EVALSTGAP2SiCS datasheet, EVALSTGAP2SiCS pinout, EVALSTGAP2SiCS application, or EVALSTGAP2SiCS equivalent, this board enables rapid validation of negative gate driving, UVLO behavior, thermal shutdown response, propagation delay (75 ns), and independent source/sink gate control under real high-side/high-voltage conditions.

Technical Context

The board implements two identical STGAP2SiCS gate drivers (U1 and U2), each with galvanically isolated inputs and rail-to-rail outputs capable of ±4 A peak current. Each driver features separate GON and GOFF terminals for independent turn-on/turn-off resistor tuning and dual input pins (IN+H/IN−H and IN+L/IN−L) supporting polarity selection and hardware interlock.

Power delivery includes two MGJ2D051509SC isolated DC-DC converters supplying VH_H/VH_L (±15 V or ±19 V) to high-side and low-side drivers, fed by a single 5 V VAUX input. The board supports TO-220 and TO-247 SiC power switches and provides accessible test points (TP1–TP17), jumpers (JP1–JP18), and decoupling networks optimized for >1 MHz switching.

Key Specifications

Availability

EVALSTGAP2SiCS is available at Aetrix Electronics and suitable for industrial motor drives, SiC-based solar inverters, EV on-board chargers, and high-efficiency UPS systems requiring stable component supply and validated reference designs.

Supply support for EVALSTGAP2SiCS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, power, and microcontroller solutions with vertical manufacturing and broad IP portfolio.

EVALSTGAP2SiCS belongs to ST's SiC ecosystem development tools product line, engineered to accelerate adoption of silicon carbide power devices through validated, safety-certified, and application-ready evaluation platforms.

FAQ

What power switch packages does EVALSTGAP2SiCS support?

The board supports TO-220 and TO-247 packaged SiC MOSFETs, with dedicated mounting footprints, thermal pads, and Kelvin-source routing. Layout includes clearance for 1200 V creepage/clearance per IEC 60664-1, and test points (TP1–TP17) allow direct probing of gate, source, and drain nodes without signal loading.

Can EVALSTGAP2SiCS drive both high-side and low-side SiC switches simultaneously?

Yes - it integrates two fully independent STGAP2SiCS drivers (U1 and U2), each with isolated inputs and outputs, enabling true half-bridge evaluation. Separate VAUX-fed isolated DC-DC converters supply VH_H and VH_L rails, eliminating shared ground coupling and supporting asymmetric gate voltage configurations.

How is negative gate driving implemented on this board?

Negative gate driving is achieved via jumper-selectable output configurations: JP7/JP9 set high-side driver output to +17/−3 V or +19/−3 V, while JP4/JP5 configure low-side output similarly. This enables −3 V turn-off bias to suppress dV/dt-induced false turn-on in high-di/dt SiC applications.

Does the board include protection against overtemperature or undervoltage?

Yes - each STGAP2SiCS IC integrates thermal shutdown and UVLO on both VDD (logic supply) and VH (gate drive supply) rails. The board routes these internal protections to status indicators and allows observation via TP14 (thermal flag) and TP15 (UVLO flag), with recovery hysteresis confirmed in DB4301 Rev 1.