STMicroelectronics EVALSTGAP2SICSC

Overview

EVALSTGAP2SiCSC from STMicroelectronics is a demonstration board for the STGAP2SiCSC galvanically isolated 4 A single gate driver, designed to evaluate high-voltage half-bridge SiC MOSFET power stages up to 1200 V. It integrates onboard isolated DC-DC converters (5.2 kV isolation), supports configurable gate driving voltages (+17/0 V, +17/−3 V, +19/0 V, +19/−3 V), and provides 3.3 V or 5 V logic supply options.

For engineers reviewing the EVALSTGAP2SiCSC datasheet, EVALSTGAP2SiCSC pinout, EVALSTGAP2SiCSC application, or EVALSTGAP2SiCSC equivalent, this board enables rapid validation of negative gate driving, Miller clamp functionality, UVLO behavior, thermal shutdown response, and propagation delay (75 ns) under real high-voltage switching conditions with TO-220/TO-247 SiC MOSFETs.

Technical Context

The board implements dual STGAP2SiCSC ICs-one for high-side and one for low-side driving-each featuring independent isolated DC-DC supplies (MGJ2D051509SC) fed by a single 5 V VAUX input. Each driver supports TTL/CMOS inputs with hysteresis and delivers rail-to-rail 4 A source/sink current at 25 °C.

Hardware interlocking is enabled via separate IN+ and IN− pins per channel, while the integrated Miller clamp (CLAMP pin) actively suppresses gate voltage spikes during fast commutation in half-bridge topologies. UVLO thresholds are set at 12.5 V (VH) and 3.0 V (VDD), with thermal shutdown activating above 150 °C.

Key Specifications

Availability

EVALSTGAP2SiCSC is available at Aetrix Electronics and suitable for industrial motor drives, SiC-based EV on-board chargers, renewable energy inverters, and high-efficiency UPS systems requiring stable component supply and validated gate driver evaluation infrastructure.

Supply support for EVALSTGAP2SiCSC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.

The EVALSTGAP2SiCSC belongs to ST's SiC ecosystem evaluation platform family, developed specifically to accelerate design-in of ST's isolated gate drivers with silicon carbide power switches in high-efficiency, high-reliability power conversion systems.

FAQ

What power switch packages can be evaluated using EVALSTGAP2SiCSC?

The board supports TO-220 and TO-247 packaged SiC MOSFETs via dedicated mounting footprints and screw terminals (J1, J2). Its layout maintains >8 mm creepage/clearance distances and uses reinforced isolation barriers to safely handle 1200 V DC bus voltages with these discrete packages.

Does EVALSTGAP2SiCSC support dual-channel simultaneous operation?

Yes - the board integrates two identical STGAP2SiCSC drivers (U1 and U2), each with independent isolated DC-DC supplies (U3 and U4), enabling true high-side/low-side half-bridge evaluation with hardware interlock via separate IN+/IN− inputs per channel.

How is negative gate voltage generated and controlled?

Negative gate voltage (e.g., −3 V) is generated by the onboard MGJ2D051509SC isolated DC-DC converters, which provide independently regulated VH_H and VH_L outputs. Jumper settings (JP3, JP4, JP5, JP7) configure whether each driver uses 0 V or −3 V as its lower rail reference.

Can the board be used with non-ST SiC MOSFETs?

Yes - the board is not limited to ST devices. Its gate drive strength (4 A), voltage range (up to 26 V), Miller clamp, and configurable biasing make it compatible with third-party 650 V and 1200 V SiC MOSFETs in TO-220/TO-247 packages, provided layout and gate charge requirements align.