STMicroelectronics EVLSTGAP3S6S

Overview

EVLSTGAP3S6S from STMicroelectronics is a half-bridge evaluation board designed to validate the STGAP3S6S isolated single-channel gate driver for SiC MOSFETs, supporting up to 520 V DC bus voltage, featuring dual on-board MGJ2D051515BSC isolated DC-DC converters (5.4 kVDC isolation), and equipped with SCTH60N120G2-7 1200 V / 60 A SiC MOSFETs in H2PAK-7 package for industrial motor drive prototyping.

For engineers reviewing the EVLSTGAP3S6S datasheet, EVLSTGAP3S6S pinout, EVLSTGAP3S6S application, or EVLSTGAP3S6S equivalent, this board enables rapid validation of desaturation protection, adjustable soft turn-off, Miller clamp functionality, negative gate driving configurations (+19/–4.7 V), and reinforced galvanic isolation (5.7 kVRMS) under real high-voltage switching conditions.

Technical Context

The board implements a functional half-bridge topology using two STGAP3S6S drivers - one per switch - each delivering 6 A peak source/sink current, 75 ns propagation delay, and rail-to-rail outputs optimized for SiC gate dynamics. Input logic supports both 3.3 V and 5 V TTL/CMOS levels with hysteresis.

Isolation is implemented via dual Murata MGJ2D051515BSC modules supplying ±15 V to high-side and low-side gate drive stages, with VIOTM = 8 kVPEAK transient overvoltage rating and VIORM = 1.2 kVPEAK maximum repetitive isolation voltage per IEC 60747-17.

Key Specifications

Availability

EVLSTGAP3S6S is available at Aetrix Electronics and suitable for industrial motor drives, SiC-based power converters, and high-voltage traction inverter development requiring stable component supply, full protection feature validation, and high-isolation gate drive evaluation.

Supply support for EVLSTGAP3S6S includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, MEMS, and microcontroller technologies for industrial, automotive, and consumer applications.

The EVLSTGAP3S6S belongs to ST's high-voltage gate driver evaluation platform family, engineered specifically to accelerate SiC and GaN power system design with validated protection schemes, isolated bias generation, and layout-optimized high-dV/dt immunity.

FAQ

What is the maximum bus voltage supported by the EVLSTGAP3S6S out-of-the-box?

The board supports up to 520 V DC bus voltage using the installed SCTH60N120G2-7 SiC MOSFETs and C4 film capacitor. This limit is defined by the voltage ratings of those components-not the STGAP3S6S driver itself, which supports higher potentials when paired with appropriately rated external devices.

Can the EVLSTGAP3S6S be used with 3.3 V microcontrollers?

Yes. The board provides flexible logic supply options: VDD can be sourced either from the onboard LDK220M-R LDO (generating 3.3 V from VAUX) or directly from VAUX = 5 V. Input pins accept 3.3 V or 5 V TTL/CMOS signals with built-in hysteresis for noise immunity.

How is desaturation protection implemented on this board?

Desaturation detection is wired per STGAP3S6S specification: DESAT pins connect to external RC networks and sense FET drain voltage during conduction. Fault events trigger DIAG outputs and illuminate dedicated red LEDs, with test points (TP10–TP13) provided for oscilloscope monitoring of DESAT timing and threshold behavior.

Does the board support negative gate driving for improved SiC switching robustness?

Yes. Jumper-selectable configurations include +19/–4.7 V and +17/–4.7 V gate drive voltages. The negative voltage is generated by the isolated DC-DC converters and applied to the VL pin, enabling active Miller clamping and enhanced immunity to false turn-on during high dV/dt commutation.