STMicroelectronics EVSTDRIVEG600DG

Overview

EVSTDRIVEG600DG from STMicroelectronics is a 50 × 70 mm FR-4 demonstration board for the STDRIVEG600 600 V high-speed half-bridge gate driver, integrated with two 150 mΩ, 650 V e-mode GaN HEMTs in PowerFLAT 5×6 mm packages, supporting HV bus up to 500 V, tunable hard-on/hard-off dV/dt, and on-board 3.3 V linear regulator (ST715M33R) for MCU-level logic supply.

For engineers reviewing the EVSTDRIVEG600DG datasheet, EVSTDRIVEG600DG pinout, EVSTDRIVEG600DG application, or EVSTDRIVEG600DG equivalent, this board enables rapid evaluation of GaN-based high-frequency power topologies including resonant LLC, active clamp flyback, and motor drive inverters - with programmable deadtime generation, Kelvin-source GaN monitoring via MMCX connectors, and thermal resistance of 25 °C/W (junction-to-ambient, still air).

Technical Context

The board implements a complete half-bridge power stage using STDRIVEG600 (SO16) driving dual GS-065-011-1-L GaN transistors, each featuring Kelvin source configuration for accurate gate control and minimized common-source inductance. The gate driver supports separated sink/source outputs and integrated bootstrap diode, enabling efficient high-side switching at >1 MHz frequencies.

On-board circuitry includes a fully configurable deadtime generator built around 74LVC1G14W5 and 74LVC1G17W5 Schmitt-trigger ICs, adjustable via TR1/TR2 trimmers (default ~100 ns), plus optically isolated high-bandwidth gate monitoring paths (CN1/CN2) compatible with MMCX differential probes - all operating under strict safety constraints due to non-isolated 500 V HV bus exposure.

Key Specifications

Availability

EVSTDRIVEG600DG is available at Aetrix Electronics and suitable for GaN-based resonant converters, high-frequency motor drives, and fast-switching SMPS designs requiring stable component supply, quick-turn evaluation, and validated thermal/mechanical layout reference.

Supply support for EVSTDRIVEG600DG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, MEMS, and microcontroller technologies for industrial, automotive, and consumer applications.

This board belongs to ST's STDRIVE evaluation platform family, designed specifically to accelerate development of high-efficiency, high-frequency GaN power systems - emphasizing safe, repeatable characterization of gate drive dynamics, deadtime effects, and thermal behavior.

FAQ

What is the maximum recommended HV bus voltage for safe operation?

The EVSTDRIVEG600DG is rated for HV bus voltages up to 500 V DC. Operation beyond this level violates the board's safety design margin and risks insulation breakdown, especially given its non-isolated architecture. The GaN devices (GS-065-011-1-L) are rated for 650 V V_DS, but board-level creepage/clearance and capacitor ratings constrain the practical limit to 500 V per ST's documentation and safety instructions.

Can the on-board deadtime generator be bypassed for external PWM control?

Yes - the board supports direct high-side/low-side PWM inputs via J2 pins 4 (HIN_B) and 5 (LIN_B) by installing jumpers R17/R18 and removing R4/R7. This configuration disables the internal deadtime generator and routes signals directly to STDRIVEG600's HIN and LIN pins, preserving full timing control to the external controller.

Is the 3.3 V regulator capable of powering an external microcontroller?

The ST715M33R LDO delivers up to 85 mA at 3.3 V (J2 pin 2), sufficient for low-power MCUs like STM32L0/L4 series or small FPGA configuration circuits. Load regulation remains within ±2% up to 50 mA; beyond that, output voltage droop and thermal rise require careful system-level derating.

Why are optical isolation and MMCX connectors specified for gate monitoring?

CN1 and CN2 provide Kelvin-source-referenced gate node access with minimal loop area and parasitic inductance. Optical isolation is mandated because the gate signals swing referenced to floating high-side potentials (up to 500 V), making standard passive probes unsafe and introducing measurement distortion - only high-bandwidth, isolated differential probes (e.g., Tektronix IsoVu) ensure accurate dV/dt and switching waveform capture.