STMicroelectronics EVSTGAP2GS
- Part No.:
- EVSTGAP2GS
- Manufacturer:
- STMicroelectronics
- Package:
- Datasheet:
-
EVSTGAP2GS.pdf
- Description:
- EVAL BOARD FOR STGAP2GS
- Quantity:
- Payment:

- Shipping:

Inventory:4,703
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
EVSTGAP2GS from STMicroelectronics is a half-bridge evaluation board designed to validate the STGAP2GS galvanically isolated single gate driver and its operation with SGT120R65AL 650 V, 75 mΩ e-mode GaN transistors. It supports high-voltage rails up to 650 V, delivers ±6 V / –3 V negative gate driving, integrates dual isolated DC-DC converters (5.2 kV isolation), and enables independent turn-on/turn-off optimization via external gate resistors.
For engineers reviewing the EVSTGAP2GS datasheet, EVSTGAP2GS pinout, EVSTGAP2GS application, or EVSTGAP2GS equivalent, this board provides hands-on validation of GaN-specific UVLO thresholds, 45 ns input-output propagation delay, 2 A/3 A source/sink drive capability, TTL/CMOS-compatible inputs with hysteresis, and hardware interlock protection for cross-conduction prevention in motor inverter and power conversion designs.
Technical Context
The EVSTGAP2GS implements a functional half-bridge topology using two STGAP2GS SO-8W gate drivers - one per switch leg - each driving an SGT120R65AL PowerFLAT 5x6 mm GaN FET. The board incorporates dedicated dead-time generation circuitry using 74LVC1G86 XOR gates and 74LVC1G17 Schmitt buffers to enforce safe switching sequencing between high-side and low-side outputs.
On-board MGJ2D051509SC isolated DC-DC converters supply ±15 V gate drive rails with 5.2 kV reinforced isolation, fed from a single 5 V VAUX input. Logic-level supply is selectable between 3.3 V and 5 V, and gate-driving voltage configuration (e.g., +6/0 V or +6/–3 V) is jumper-controlled to match e-GaN transistor requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Half-bridge evaluation platform with dual STGAP2GS drivers and two SGT120R65AL GaN FETs |
| Max HV rail | 650 V - validated for use with 650 V e-mode GaN transistors under switching conditions |
| Gate drive config | +6 V / –3 V or +6 V / 0 V - selectable via on-board jumpers for optimized GaN turn-off |
| Isolation rating | 5.2 kV - achieved via Murata MGJ2D051509SC DC-DC converters for high-side gate supply |
| Propagation delay | 45 ns - measured input-to-output delay enabling precise timing control in high-frequency inverters |
| Input logic | 3.3 V / 5 V TTL/CMOS with hysteresis - ensures noise immunity and robust PWM signal reception |
| Protection features | UVLO optimized for e-GaN threshold, thermal shutdown, and hardware interlock - prevents shoot-through during controller faults |
Availability
EVSTGAP2GS is available at Aetrix Electronics and suitable for industrial motor drives, server power supplies, and high-efficiency AC-DC converters requiring stable component supply, rapid prototyping support, and GaN gate driver validation under real-world conditions.
Supply support for EVSTGAP2GS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, MEMS, and microcontroller technologies for industrial, automotive, and consumer applications.
The EVSTGAP2GS belongs to ST's GaN ecosystem evaluation platform series, engineered to accelerate adoption of enhancement-mode GaN transistors in high-frequency, high-efficiency power conversion systems by providing fully characterized, ready-to-run reference hardware.
FAQ
What GaN transistors are supported on the EVSTGAP2GS board?
The EVSTGAP2GS board is specifically configured for the SGT120R65AL - a 650 V, 75 mΩ e-mode GaN transistor in PowerFLAT 5x6 mm package. Its gate drive characteristics, UVLO threshold, and negative turn-off voltage requirements are matched to this device. Other GaN FETs may be substituted only after verifying pin compatibility, threshold voltage, and gate charge requirements against the STGAP2GS driver specifications.
Can the EVSTGAP2GS operate with a 1200 V rail as stated in the device description?
No - while the underlying STGAP2GS gate driver IC supports up to 1200 V high-side floating operation, the EVSTGAP2GS evaluation board is rated for 650 V maximum due to PCB layout, capacitor voltage ratings (C1/C2: 630 V), and SGT120R65AL FET limitations. Operating above 650 V violates board safety margins and risks component failure.
How is hardware interlock implemented on this board?
Hardware interlock is realized using dual 74LVC1G86 XOR gates and 74LVC1G17 Schmitt buffers that condition PWMH and PWML signals. When both inputs go active simultaneously, the logic forces complementary outputs to prevent concurrent high-side and low-side conduction. This function remains active independent of the host controller, mitigating shoot-through during firmware crashes or timing errors.
Does the board support external gate resistor customization?
Yes - the EVSTGAP2GS provides accessible solder pads and test points (e.g., TP5, TP8) adjacent to each STGAP2GS GON/GOFF pins, allowing direct insertion of discrete gate resistors. This enables empirical tuning of dV/dt, switching losses, and EMI behavior without modifying the core driver layout or compromising isolation integrity.
EVSTGAP2GS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Power Management
- Function:
- Gate Driver
- Embedded:
- No
- Utilized IC / Part:
- STGAP2GS
- Primary Attributes:
- Isolated
- Secondary Attributes:
- On-Board Test Points
- Contents:
- Board(s)
EVSTGAP2GS FAQ
1.How can I place an order for EVSTGAP2GS through Aetrix?
Please submit a Request for Quotation (RFQ) for EVSTGAP2GS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for EVSTGAP2GS reliable?
The price and inventory of EVSTGAP2GS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for EVSTGAP2GS is usually 5 days.
3.What payment methods are accepted for EVSTGAP2GS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for EVSTGAP2GS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for EVSTGAP2GS?
EVSTGAP2GS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your EVSTGAP2GS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for EVSTGAP2GS?
For technical support, including EVSTGAP2GS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your EVSTGAP2GS requirements.
6.How does Aetrix verify that EVSTGAP2GS is sourced from the original manufacturer or authorized distributors?
All EVSTGAP2GS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that EVSTGAP2GS meets industry standards.
7.What is the process for return or replacement of EVSTGAP2GS?
All EVSTGAP2GS units undergo pre-shipment inspection (PSI). If there is an issue with EVSTGAP2GS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The EVSTGAP2GS part is unused and in its original packaging.
Return procedure for EVSTGAP2GS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
EVSTGAP2GS Tags
-
BOB-12009
SparkFun Electronics

-
106990290
Seeed Technology Co., Ltd
-
BOB-11771
SparkFun Electronics

-
BOB-09118
SparkFun Electronics

-
4410
Adafruit Industries LLC

-
5335
Adafruit Industries LLC
-
BOB-11189
SparkFun Electronics

-
3295
Adafruit Industries LLC

-
3421
Adafruit Industries LLC

-
1904
Adafruit Industries LLC

-
2717
Adafruit Industries LLC

-
3190
Adafruit Industries LLC
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
