Texas Instruments F2800155SPMR
- Part No.:
- F2800155SPMR
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
F2800155SPMR.pdf
- Description:
- C2000 32-BIT MCU 120-MHZ 128-KB
- Quantity:
- Payment:

- Shipping:

Inventory:4,185
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Product details
Overview
F2800155SPMR from Texas Instruments is a dual-core C28x real-time microcontroller operating at 120MHz with IEEE 754 FPU, TMU, and VCRC acceleration, 128KB ECC-protected flash, 36KB ECC/parity-protected RAM, and functional safety certification up to ASIL B for automotive powertrain control.
For engineers reviewing the F2800155SPMR datasheet, F2800155SPMR pinout, F2800155SPMR application, or F2800155SPMR equivalent, this page delivers verified core frequency, memory configuration, analog subsystem specs, safety qualification level, and package-specific GPIO count - all confirmed for the S-grade, PM-suffix (64-pin LQFP) variant.
Technical Context
The F2800155SPMR implements lockstep dual-C28x CPUs with hardware-level redundancy checking, enabling ASIL B compliance without software overhead. Its real-time signal chain integrates two 4MSPS 12-bit ADCs with four post-processing blocks per converter and one full CMPSS with 12-bit ramp DAC.
Control execution is accelerated by dedicated peripherals: 14 ePWM channels (4 with 150ps resolution), three eCAP modules, two eQEP units supporting CW/CCW, and embedded pattern generation. Communication includes CAN FD (MCAN), CAN, PMBus, SPI, three SCI UARTs, LIN, two I²C, and one PMBus interface - all with configurable pin multiplexing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Dual 32-bit C28x CPUs in lockstep for fault-detection redundancy |
| CPU Frequency | 120 MHz - enables deterministic 8.33 ns instruction cycle for high-speed motor control loops |
| Flash Memory | 128 KB (64 KW) ECC-protected - supports secure firmware updates and runtime error correction |
| RAM | 36 KB (18 KW) with ECC/parity protection - ensures data integrity in safety-critical variables |
| Analog Subsystem | Two 4 MSPS 12-bit ADCs with 4 PPB per ADC - enables simultaneous sampling of multiple current/voltage sensors in inverters |
| ePWM Resolution | 150 ps high-resolution capability on 4 channels - achieves precise dead-time control for SiC/GaN gate drivers |
| Safety Certification | ISO 26262 ASIL B certified by TÜV SÜD - reduces system-level FMEDA effort for automotive ECU designs |
| Operating Temperature | –40°C to +125°C ambient - validated for under-hood automotive and industrial motor drive environments |
Pinout & Package
64-pin Low-profile Quad Flatpack (LQFP), 12 mm × 12 mm body size, thermally enhanced with exposed pad. Pin count and peripheral accessibility match the PM suffix variant per TI SPRSP68D documentation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDIO, VDDA | Power supply inputs | Separate 1.2V core, 3.3V I/O, and analog supplies enable noise isolation for ADC and PWM timing |
| VSS, VSSA | Ground returns | Dedicated analog ground (VSSA) minimizes coupling between digital switching and precision analog acquisition |
| XRSn | Active-low reset input | Asynchronous hardware reset with internal pull-up; compatible with external watchdog assertion |
| X1, X2 | Crytal oscillator terminals | Supports 1–20 MHz crystal or external clock source; optional use as GPIO when INTOSC selected |
| TCK, TMS, TDO, TDI | JTAG debug interface | IEEE 1149.1-compliant boundary scan and emulation; TDI/TDO usable as GPIO when cJTAG enabled |
| A0–A20, C0–C19 | Analog input / comparator reference | Multiplexed ADC input channels and CMPSS DAC outputs; A0/C15 doubles as CMP1_DACL |
| GPIO0–GPIO37 | General-purpose I/O | 37 total GPIOs on PM package (11 shared with analog, 4 shared with JTAG/X1/X2); programmable pullup/pulldown |
Key Features
| Feature | Design Value |
|---|---|
| Dual-lockstep C28x cores | Hardware-enforced CPU redundancy eliminates need for software-based safe state monitoring in ASIL B systems |
| Trigonometric Math Unit (TMU) | Accelerates sine/cosine/arctan operations in <100 cycles - critical for field-oriented motor control coordinate transforms |
| VCRC engine | Hardware CRC-32 computation offloads checksum validation from CPU during flash programming and communication frame verification |
| Embedded Pattern Generator (EPG) | Generates complex PWM waveforms autonomously - reduces CPU load in multi-phase interleaved DC/DC topologies |
| Functional Safety Documentation | Includes FIT rate, failure mode analysis, and diagnostic coverage reports aligned with ISO 26262 Part 5 Annex D |
Applications
| Automotive Inverter Control | Industrial Servo Drive |
|---|---|
Use Scenario: Real-time torque and flux control in 400V traction inverters for hybrid powertrains. IC Role / Device Role / Timing Role: Primary controller executing FOC algorithm, managing gate driver signals via 14-channel ePWM with 150ps resolution, and sampling phase currents via dual 4MSPS ADCs. Use Value: Lockstep CPU architecture and ASIL B certification reduce functional safety validation effort while meeting <1 µs current-loop latency requirements. | Use Scenario: High-bandwidth position and velocity regulation in robotic joint actuators with integrated motor and encoder. IC Role / Device Role / Timing Role: Real-time motion controller using two eQEP modules for quadrature decoding and 14 ePWM channels for 3-phase inverter + brake chopper control. Use Value: TMU-accelerated Clarke/Park transforms and 120MHz deterministic execution enable 20 kHz servo loop rates with sub-microsecond jitter. |
| On-Board Charger (OBC) | DC/DC Converter Control |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in 11 kW EV on-board chargers with PFC + LLC stages. IC Role / Device Role / Timing Role: Master controller coordinating interleaved PFC and resonant LLC control using ePWM XBAR, ADC synchronization, and PMBus for system-level communication. Use Value: Dual ADCs with 4 PPB per channel allow simultaneous voltage/current sensing across multiple power stages without external muxing or latency penalties. | Use Scenario: Isolated 48V-to-12V bidirectional DC/DC conversion in server power supplies and telecom rectifiers. IC Role / Device Role / Timing Role: Digital controller implementing phase-shifted full-bridge modulation with adaptive dead-time compensation via HRPWM and CMPSS-based overcurrent protection. Use Value: Integrated 12-bit CMPSS with ramp DAC provides <500 ns response time for peak-current limiting - eliminating need for external comparators and reducing BOM count. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar real-time control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320F2800157SPMR | 256KB flash, same 120MHz dual-core, identical peripherals and package options | Higher firmware storage capacity for complex OBC or VCU applications requiring dual-bank OTA updates | Select when >128KB flash is required for application code + safety monitor partitioning |
| TMS320F2800155PMR | Same silicon die and electrical specs; differs only in tape-and-reel packaging (SPMR = tray, PMR = reel) | No functional difference - identical performance, qualification, and thermal behavior | Choose PMR for automated SMT assembly; SPMR for prototyping or low-volume evaluation |
Compared with TMS320F2800157SPMR, F2800155SPMR trades flash capacity for cost-sensitive applications while retaining identical real-time control capability, safety certification, and peripheral set; versus F2800155PMR, it offers identical functionality in tray packaging for manual or semi-automated placement.
Availability
F2800155SPMR is available at Aetrix Electronics and suitable for automotive powertrain control, industrial servo drives, and onboard charger (OBC) designs requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.
Supply support for F2800155SPMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets.
The TMS320F280015x product line targets cost-optimized real-time control in power electronics, emphasizing ultra-low latency, integrated analog signal chains, and functional safety readiness for automotive and industrial motor drives.
FAQ
What is the maximum operating frequency of the F2800155SPMR?
The F2800155SPMR operates at a maximum CPU frequency of 120 MHz, delivering deterministic 8.33 ns instruction cycles. This frequency is sustained across the full –40°C to +125°C ambient temperature range and is validated for continuous operation in automotive under-hood environments per TI's recommended operating conditions.
Does the F2800155SPMR include hardware support for functional safety standards?
Yes, the F2800155SPMR is ISO 26262 certified up to ASIL B by TÜV SÜD and IEC 61508 certified up to SIL 2. It includes lockstep dual-C28x CPUs, ECC-protected memory, memory built-in self-test (MPOST), windowed watchdog timers, and dual-clock comparators - all documented in TI's functional safety package for system-level compliance.
How many GPIO pins are available on the F2800155SPMR in the 64-pin LQFP (PM) package?
The F2800155SPMR in the 64-pin LQFP (PM) package provides 37 GPIO pins. Of these, 11 are shared with analog inputs (AIO), and 4 are shared with JTAG debug signals (TDI, TDO, X1, X2). When cJTAG is enabled, TDI/TDO become usable as GPIO; when INTOSC is selected as clock source, X1/X2 also function as GPIO.
What analog peripherals are integrated into the F2800155SPMR?
The F2800155SPMR integrates two independent 12-bit, 4 MSPS ADCs with up to 21 external input channels (11 shared with GPIO), four post-processing blocks (PPB) per ADC, one full CMPSS with 12-bit ramp DAC, three CMPSS_LITE modules with 9.5-bit static DACs, and a temperature sensor - all tightly coupled to ePWM and eCAP for real-time closed-loop control.
Is the F2800155SPMR pin-compatible with other devices in the F280015x family?
Within the same package option (e.g., 64-pin PM), the F2800155SPMR is pin-compatible with F2800157SPMR, F2800155PMR, and F2800157PMR. All share identical pin assignments, electrical characteristics, and peripheral mapping. Differences are limited to flash size (128KB vs. 256KB) and ordering format (tray vs. reel), not pin function or layout.
F2800155SPMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 64-LQFP
- Series:
- C2000™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- TMS320C28x
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, I2C, SCI, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, I2S, POR, PWM, WDT
- Number of I/O:
- 37
- Program Memory Size:
- 128KB (64K x 16)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 18K x 16
- Voltage - Supply (Vcc/Vdd):
- 2.8V ~ 3.63V
- Data Converters:
- A/D 21x12b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
F2800155SPMR FAQ
1.How can I place an order for F2800155SPMR through Aetrix?
Please submit a Request for Quotation (RFQ) for F2800155SPMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for F2800155SPMR reliable?
The price and inventory of F2800155SPMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for F2800155SPMR is usually 5 days.
3.What payment methods are accepted for F2800155SPMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for F2800155SPMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for F2800155SPMR?
F2800155SPMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your F2800155SPMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for F2800155SPMR?
For technical support, including F2800155SPMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your F2800155SPMR requirements.
6.How does Aetrix verify that F2800155SPMR is sourced from the original manufacturer or authorized distributors?
All F2800155SPMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that F2800155SPMR meets industry standards.
7.What is the process for return or replacement of F2800155SPMR?
All F2800155SPMR units undergo pre-shipment inspection (PSI). If there is an issue with F2800155SPMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The F2800155SPMR part is unused and in its original packaging.
Return procedure for F2800155SPMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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