Texas Instruments F28M35M52C1RFPS

Overview

F28M35M52C1RFPS from Texas Instruments is a dual-core Concerto™ microcontroller integrating an Arm® Cortex®-M3 master subsystem (100 MHz) and a TMS320C28x real-time control subsystem (150 MHz), with 512KB ECC flash, 32KB RAM (ECC/parity), 64KB shared RAM, dual 12-bit ADCs (2.88 MSPS), six comparators with DACs, and Ethernet 1588 + USB OTG + dual CAN interfaces - designed for industrial motor drives and solar inverters.

For engineers reviewing the F28M35M52C1RFPS datasheet, F28M35M52C1RFPS pinout, F28M35M52C1RFPS application, or F28M35M52C1RFPS equivalent, this page delivers verified core speeds, memory architecture, analog subsystem specs, thermal package details, and validated alternative parts for embedded power electronics design.

Technical Context

The F28M35M52C1RFPS implements tightly coupled dual-core operation: the Cortex-M3 handles high-level communication (Ethernet 1588 MII, USB OTG + PHY, 5 UARTs, 2 I²C, 4 SSI/SPI) while the C28x CPU executes deterministic real-time control (9 ePWM modules with 16 high-resolution outputs, 6 eCAP, 3 eQEP, VCU-accelerated math). Interprocessor Communication (IPC) uses 32 handshaking channels and 4KB message RAM to coordinate data exchange between subsystems.

Its analog subsystem features two independent 12-bit ADCs (2.88 MSPS total, 20-channel aggregate), four sample-and-hold circuits, and six comparator-DAC units - all synchronized via shared clocking and accessible by both cores. Power delivery employs separate 1.2-V digital, 1.8-V analog, and 3.3-V I/O rails with on-chip voltage regulation and redundant clock sources including dynamic PLL ratio adjustment.

Key Specifications

Pinout & Package

144-pin RFP PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP), 20.0 mm × 20.0 mm body size, with exposed thermal pad requiring soldering to PCB ground plane for optimal thermal dissipation and digital ground integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core real-time control applications.

Compared with F28M35H52CRFP, F28M35M52C1RFPS removes ENET/USB to reduce cost and power, while retaining identical C28x control capability; versus F28388D, it trades EtherCAT determinism for Arm-based protocol stack offload - making it optimal for solar inverters and industrial drives requiring both high-fidelity control and flexible connectivity.

Availability

F28M35M52C1RFPS is available at Aetrix Electronics and suitable for industrial motor drives, solar inverters, and uninterruptible power supplies requiring stable component supply, long-term lifecycle support, and automotive-grade thermal reliability (–40°C to 105°C junction).

Supply support for F28M35M52C1RFPS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.

The F28M35x Concerto™ family was designed to unify communication and real-time control on a single chip - addressing the system-level complexity of solar inverters, motor drives, and industrial automation where separation of protocol stacks and deterministic control loops is critical.

FAQ

What is the maximum operating frequency of each core in the F28M35M52C1RFPS?

The F28M35M52C1RFPS features an Arm Cortex-M3 core rated up to 100 MHz and a TMS320C28x core rated up to 150 MHz. However, due to shared clocking constraints, simultaneous operation at both maxima is not supported; valid combinations include 100 MHz M3 + 100 MHz C28x or 75 MHz M3 + 150 MHz C28x per TI's documented speed matrix. The F28M35M52C1RFPS datasheet specifies these pairings explicitly.

Does the F28M35M52C1RFPS include integrated Ethernet 1588 support?

No, the F28M35M52C1RFPS does not include Ethernet 1588 support. According to TI's device comparison table (SPRS742L), ENET 1588 MII is present in the H52C variant but explicitly omitted in the M52C series. The F28M35M52C1RFPS pinout and functional block diagram confirm absence of MII signal pins (e.g., MIITXCLK, MIIRXDV), confirming this is a hardware-level exclusion, not a disabled feature.

How much shared RAM is available on the F28M35M52C1RFPS, and what is its access mechanism?

The F28M35M52C1RFPS provides 64KB of shared RAM implemented as eight 8KB parity-protected blocks (S0–S7). Both the Cortex-M3 and C28x subsystems access this memory via dedicated AHB and C28 DMA buses, coordinated through the Interprocessor Communication (IPC) module. This architecture enables zero-copy data exchange between cores - for example, ADC samples captured by C28x can be directly consumed by Cortex-M3 network stacks without CPU-mediated transfers.

What analog peripherals are included in the F28M35M52C1RFPS, and how are they allocated between cores?

The F28M35M52C1RFPS integrates two independent 12-bit ADCs (2.88 MSPS aggregate, 20 channels total), four sample-and-hold circuits, and six analog comparators with integrated 10-bit DACs. All analog resources are accessible by both cores via shared memory-mapped registers and configurable interrupt routing - allowing the C28x to handle high-speed current loop sampling while the Cortex-M3 monitors temperature and DC bus voltage for system-level diagnostics.

Is the F28M35M52C1RFPS pin-compatible with other devices in the F28M35x family?

Yes, the F28M35M52C1RFPS is pin-compatible with other 144-pin RFP PowerPAD™ variants in the F28M35x family, including F28M35H52CRFP and F28M35H22CRFP, sharing identical HTQFP mechanical dimensions, power pin layout, and GPIO multiplexing. However, peripheral availability differs: ENET, USB, and certain timer modules are disabled in M52C, meaning PCB designs must avoid relying on those signals even though the pins physically exist.