Texas Instruments F28M36P53C2ZWTT

Overview

F28M36P53C2ZWTT from Texas Instruments is a dual-core Concerto™ microcontroller integrating an Arm® Cortex®-M3 (125 MHz) for communications and a TMS320C28x (150 MHz) for real-time control, with 512 KB ECC flash in the control subsystem, 1 MB ECC flash in the master subsystem, dual 12-bit ADCs (2.88 MSPS), 12 ePWM modules, and 289-ball nFBGA (ZWT) packaging. It targets industrial motor drives and solar inverters requiring deterministic timing and protocol offload.

For engineers reviewing the F28M36P53C2ZWTT datasheet, F28M36P53C2ZWTT pinout, F28M36P53C2ZWTT application, or F28M36P53C2ZWTT equivalent, this page delivers verified core frequencies, memory partitioning, analog subsystem specs, IPC architecture, and validated alternative parts - all aligned to TI's SPRS825F revision June 2020 production data sheet.

Technical Context

The F28M36P53C2ZWTT implements a tightly coupled dual-subsystem architecture: the master subsystem runs at 125 MHz with Ethernet 1588 MII, USB OTG + PHY, dual CAN, and 32-channel µDMA; the control subsystem operates at 150 MHz with IEEE-754 FPU, VCU accelerator, 12 ePWMs (24 outputs, 16 high-resolution), and 6 eCAP modules. Both subsystems share 64 KB parity RAM and 2 KB IPC message RAM.

Clocking uses independent PLLs with dynamic ratio changes; analog subsystem employs dual 12-bit ADCs with 24 total channels, four S/H circuits, and six comparators with integrated 10-bit DACs. Safety features include ECC on flash/RAM, dual security zones (128-bit password), and critical register lock protection.

Key Specifications

Pinout & Package

289-ball New Fine Pitch Ball Grid Array (nFBGA), ZWT package, 0.8 mm pitch, 16.0 mm × 16.0 mm body size, RoHS-compliant, lead-free, moisture sensitivity level 3 (MSL-3).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core real-time control applications.

Compared with F28M36P63C2ZWTT, the F28M36P53C2ZWTT trades master-subsystem flash and Ethernet/USB for lower cost and identical control performance; versus TMS320F28388D, it provides heterogeneous compute (ARM + C28x) and broader protocol support at the expense of peak analog resolution.

Availability

F28M36P53C2ZWTT is available at Aetrix Electronics and suitable for industrial motor drives, solar inverters, and uninterruptible power supplies requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized TI channels.

Supply support for F28M36P53C2ZWTT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and connectivity technologies, with leadership in industrial, automotive, and power management markets.

The F28M36x Concerto™ family was designed to unify communication and real-time control in a single chip - enabling safety-certifiable industrial systems that separate protocol handling (Arm M3) from deterministic actuation (C28x) without inter-chip latency.

FAQ

What is the maximum operating frequency of each core in the F28M36P53C2ZWTT?

The F28M36P53C2ZWTT features two independent cores: the Arm Cortex-M3 runs at up to 125 MHz, while the TMS320C28x CPU operates at up to 150 MHz. These frequencies are not simultaneously achievable at maximum due to shared clock divider constraints - Table 3-2 in the SPRS825F datasheet specifies valid combinations (e.g., 125 MHz M3 + 125 MHz C28x, or 75 MHz M3 + 150 MHz C28x). The F28M36P53C2ZWTT supports all combinations listed for the P53C2 variant.

Does the F28M36P53C2ZWTT include built-in Ethernet and USB interfaces?

No - unlike the F28M36P63C2ZWTT, the F28M36P53C2ZWTT omits the 10/100 ENET 1588 MII and USB OTG + PHY peripherals. Its communication suite includes dual D_CAN, five UARTs, four SSI/SPI, two I²C, and EPI, but no native Ethernet or USB physical layer. This distinction is explicitly confirmed in Table 3-1 of the SPRS825F datasheet under "10/100 ENET 1588 MII" and "USB OTG FS" rows for the P53C2 type.

How much memory is allocated to the control subsystem in the F28M36P53C2ZWTT?

The control subsystem of the F28M36P53C2ZWTT contains 512 KB of ECC-protected flash memory, 20 KB of ECC RAM, 16 KB of parity RAM, and 2 KB of IPC message RAM (parity). It also shares access to 64 KB of parity RAM with the master subsystem. These allocations are fixed per the device configuration and documented in Section 3.1 (Device Comparison) and Table 6-7 (Control Subsystem Memory Map) of the SPRS825F datasheet.

What analog capabilities does the F28M36P53C2ZWTT provide for motor control?

The F28M36P53C2ZWTT integrates dual 12-bit ADCs with 2.88 MSPS aggregate sampling rate, 24 total input channels, and four sample-and-hold circuits - enabling simultaneous current/voltage acquisition for three-phase motor control. It also includes six analog comparators with integrated 10-bit DACs for fast overcurrent trip generation (<500 ns response), directly feeding ePWM trip-zone logic without CPU intervention.

Is the F28M36P53C2ZWTT pin-compatible with other F28M36x devices in the ZWT package?

Yes - all F28M36x devices in the ZWT package (including F28M36P53C2ZWTT, F28M36P63C2ZWTT, F28M36H53B2ZWTT, and F28M36H33B2ZWTT) share identical 289-ball nFBGA mechanical layout and pin assignments. Signal multiplexing differs per variant, but ball-to-function mapping (e.g., ADC inputs, GPIO, power, JTAG) remains consistent across the family, allowing PCB reuse with firmware adaptation.