Texas Instruments F28P650DK6PZP
- Part No.:
- F28P650DK6PZP
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 100-TQFP Exposed Pad
- Datasheet:
-
F28P650DK6PZP.pdf
- Description:
- C2000 32-BIT MCU, 2X C28X+CLA CP
- Quantity:
- Payment:

- Shipping:

Inventory:833
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Product details
Overview
TMS320F28P650DK6PZP from Texas Instruments is a dual-CPU C28x real-time microcontroller with CLA, 200MHz operation, 1.28MB ECC-protected flash, and 248KB parity-protected RAM, designed for high-fidelity motor control in industrial inverters and EV charging systems.
For engineers reviewing the TMS320F28P650DK6PZP datasheet, TMS320F28P650DK6PZP pinout, TMS320F28P650DK6PZP application, or TMS320F28P650DK6PZP equivalent, this page delivers verified specifications, package mapping to HTQFP-100, confirmed 36-channel HRPWM capability, and functional safety support up to ASIL B per TÜV SÜD certification.
Technical Context
The TMS320F28P650DK6PZP integrates two lockstep-capable C28x DSP cores and one independent CLA CPU, each operating at 200MHz, with IEEE 754 double-precision FPU, TMU, and VCRC acceleration. Its analog subsystem includes three 16-bit/12-bit ADCs (1.19MSPS @ 16-bit), 11 windowed comparators with DAC references, and hardware oversampling up to 128×.
Control peripherals feature 36 ePWM channels with 150ps resolution, MINDB/ICL logic for multilevel converter support, six eQEP modules, and 16 SDFM input channels. Communications include two CAN FD controllers, EtherCAT SubDevice Controller, USB 2.0, FSI (200Mbps), and PMBus-enabling deterministic real-time control across isolated power domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Architecture | Dual 32-bit C28x DSP + single CLA CPU, all at 200MHz; enables parallel real-time signal processing and independent control law execution. |
| Flash / RAM | 1.28MB ECC-protected flash (5 banks); 248KB RAM (Enhanced Parity-protected); supports live firmware update without power cycle. |
| ADC Performance | Three 16-bit/12-bit ADCs: 1.19MSPS (16-bit) or 3.92MSPS (12-bit); simultaneous sampling via separate S/H; hardware oversampling up to 128×. |
| PWM Capability | 36 ePWM channels, all with 150ps high-resolution; includes MINDB, ICL, and Diode Emulation for resonant/multilevel topologies. |
| Safety Certification | ISO 26262 certified up to ASIL B (TÜV SÜD); SIL 2 compliant; lockstep on C28x CPU2; MPOST, HWBIST, and reciprocal ADC comparison. |
| Package & Pin Count | HTQFP-100 (PZP suffix); 100-pin thermally enhanced thin quad flatpack; 49 GPIO + 13 AIO pins; 163 total I/O capable in ZEJ variant (not applicable here). |
| Operating Temp | –40°C to +125°C ambient; qualified for industrial and automotive environments per AEC-Q100 (Q1 variants only). |
Pinout & Package
Package: 100-pin PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP), 16mm × 16mm, 0.5mm pitch, PZP suffix. Thermal pad enables low-junction-to-board resistance for high-power motor control applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDIO | I/O Supply Rail | 3.3V supply for all digital I/O banks; decoupling required per TI layout guidelines to maintain signal integrity under PWM switching noise. |
| VDDA / VSSA | Analog Power/Ground | Separate 3.3V analog supply and ground planes isolate sensitive ADC/DAC reference paths from digital switching transients. |
| VREFHIA / VREFLOA | ADC Reference Inputs | Accept external 0–3.3V reference pair; enable ratiometric measurement accuracy critical for current sensing in inverter legs. |
| ePWMxA / ePWMxB | High-Resolution PWM Outputs | Complementary PWM pairs with programmable dead-time; 150ps resolution supports GaN/SiC gate drivers at >1MHz switching frequencies. |
| GPIOxx | Configurable Digital I/O | 100-pin variant provides 49 GPIO + 13 AIO pins; multiplexed with ADC, eCAP, eQEP, SPI, CAN, and LIN functions per pin attribute table. |
Key Features
| Feature | Design Value |
|---|---|
| Triple ADC with Hardware Oversampling | Enables 18-bit effective resolution via 128× hardware accumulation-reducing software overhead and improving current-loop fidelity in servo drives. |
| Configurable Logic Block (CLB) | Six logic tiles implement encoder interfaces, custom PWM edge generation, or fault-handling logic-eliminating need for external CPLD in motor control PCBs. |
| Live Firmware Update (LFU) | Hardware-accelerated context switch between old/new firmware images in <100μs; supports field-upgradable safety-critical motor control without system downtime. |
| EtherCAT SubDevice Controller | Integrated ESC eliminates external ASIC; enables deterministic <1μs jitter motion control networks for collaborative robots and CNC systems. |
| Dual CAN FD Interfaces | Two independent CAN FD controllers (up to 5Mbps data phase) support redundant communication paths and high-bandwidth diagnostics in EV charging stations. |
Applications
| Industrial Servo Drive | DC Fast Charging Station |
|---|---|
|
Use Scenario: Closed-loop torque and position control of PMSM/BLDC motors in robotic arms and CNC spindles. IC Role / Device Role / Timing Role: Real-time execution of field-oriented control (FOC) algorithms across dual C28x CPUs, with CLA handling PWM modulation and ADC post-processing. Use Value: 150ps HRPWM resolution enables precise dead-time compensation for SiC inverters, reducing switching losses by up to 12% versus legacy MCUs. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion control in 150kW+ EV charging infrastructure. IC Role / Device Role / Timing Role: Coordination of interleaved LLC and phase-shifted full-bridge stages via 36-channel HRPWM; EtherCAT synchronizes multiple power modules. Use Value: Dual CAN FD interfaces provide redundant communication to BMS and grid management systems, meeting UL 1998 functional safety requirements. |
| Solar String Inverter | Automotive HVAC Compressor |
|
Use Scenario: MPPT tracking and grid-synchronization for residential/commercial photovoltaic string inverters. IC Role / Device Role / Timing Role: Simultaneous execution of fast MPPT (using TMU-accelerated perturb-and-observe) and grid-tie PLL on separate C28x cores; CLA manages isolation barrier FSI messaging. Use Value: Hardware CRC engine and BGCRC module ensure integrity of firmware updates over-the-air in distributed solar deployments. |
Use Scenario: High-efficiency variable-speed compressor control in electric vehicle thermal management systems. IC Role / Device Role / Timing Role: Safety-certified motor control with lockstep C28x CPU2 monitoring CPU1; ADC redundancy checker validates current feedback against functional safety ASIL B requirements. Use Value: Integrated AES-128 accelerator secures CAN FD firmware updates, preventing unauthorized reprogramming of HVAC ECU in production vehicles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar real-time motor control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320F28379D | Single C28x+CLA subsystem; 1MB flash; no EtherCAT; 176-pin QFP package. | Lacks dual-CPU lockstep and EtherCAT-unsuitable for ASIL B or synchronized multi-axis motion control. | Select when cost-sensitive industrial drives require high PWM count but not functional safety or industrial Ethernet. |
| TMS320F28P650DK6 | Same core architecture and peripherals, but in 256-ball nFBGA (ZEJ) package; higher I/O count (185 GPIO). | Better thermal performance and routing density for high-channel-count inverters; incompatible PCB footprint. | Choose for space-constrained, high-power-density designs where thermal pad access and pin scalability outweigh QFP manufacturability. |
Compared with TMS320F28P650DK6PZP, the TMS320F28379D offers lower cost and adequate compute for basic FOC but lacks safety mechanisms and EtherCAT; the TMS320F28P650DK6 provides superior I/O and thermal headroom in BGA form, requiring board redesign but enabling next-gen SiC system integration.
Availability
TMS320F28P650DK6PZP is available at Aetrix Electronics and suitable for industrial servo drives, DC fast charging stations, and solar string inverters requiring stable component supply across extended product lifecycles.
Supply support for TMS320F28P650DK6PZP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and power electronics markets.
The TMS320F28P650DK6PZP belongs to TI's C2000™ real-time MCU family, engineered specifically for ultra-low-latency control of power converters using SiC, GaN, and IGBT devices in high-switching-frequency applications.
FAQ
What is the maximum operating frequency of the C28x CPUs in the TMS320F28P650DK6PZP?
The TMS320F28P650DK6PZP features two C28x DSP CPUs, each operating at 200MHz. This frequency is fixed and guaranteed across the full –40°C to +125°C ambient temperature range. The CLA CPU also runs at 200MHz, delivering independent real-time processing capacity. All timing parameters in the datasheet-including ADC conversion time and PWM resolution-are specified at this rated frequency.
Does the TMS320F28P650DK6PZP support functional safety certification out of the box?
Yes, the TMS320F28P650DK6PZP is ISO 26262 certified up to ASIL B by TÜV SÜD and IEC 61508 certified up to SIL 2. It includes hardware safety features such as lockstep on C28x CPU2, memory POST, HWBIST, and reciprocal ADC comparison logic-all documented in TI's Industrial Functional Safety for C2000™ guide. No additional silicon modification is required to leverage these capabilities.
How many high-resolution PWM channels does the TMS320F28P650DK6PZP provide, and what is their minimum resolution?
The TMS320F28P650DK6PZP provides 36 ePWM channels, all supporting high-resolution mode with 150ps step size. This resolution is achieved via digital slope compensation and fractional period registers, enabling precise dead-time control for SiC and GaN power stages. Each channel supports complementary output pairs with programmable trip zones and event synchronization.
What package type and pin count does the TMS320F28P650DK6PZP use?
The TMS320F28P650DK6PZP uses a 100-pin PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP), designated by the PZP suffix. Its mechanical dimensions are 16mm × 16mm with 0.5mm pitch. The exposed thermal pad underneath the package must be soldered to a dedicated PCB copper area for optimal junction-to-board thermal resistance.
Can the TMS320F28P650DK6PZP execute EtherCAT communication without an external controller?
Yes, the TMS320F28P650DK6PZP integrates a fully compliant EtherCAT SubDevice Controller (ESC) that handles frame processing, mailbox protocol, and distributed clock synchronization in hardware. No external ASIC or FPGA is needed-only external PHY and magnetics are required to implement a Class A EtherCAT node for motion control networks.
F28P650DK6PZP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 100-TQFP Exposed Pad
- Series:
- C2000™ C28x Piccolo™
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- C28x
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 200MHz
- Connectivity:
- CANbus, I2C, SCI, SPI, UART/USART, USB
- Peripherals:
- AES, Brown-out Detect/Reset, DMA, POR, PWM, WDT
- Number of I/O:
- 49
- Program Memory Size:
- 1.28MB (1.28M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 248K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.8V ~ 3.63V
- Data Converters:
- A/D 24x12/16b SAR; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
F28P650DK6PZP FAQ
1.How can I place an order for F28P650DK6PZP through Aetrix?
Please submit a Request for Quotation (RFQ) for F28P650DK6PZP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for F28P650DK6PZP reliable?
The price and inventory of F28P650DK6PZP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for F28P650DK6PZP is usually 5 days.
3.What payment methods are accepted for F28P650DK6PZP?
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F28P650DK6PZP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your F28P650DK6PZP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for F28P650DK6PZP?
For technical support, including F28P650DK6PZP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your F28P650DK6PZP requirements.
6.How does Aetrix verify that F28P650DK6PZP is sourced from the original manufacturer or authorized distributors?
All F28P650DK6PZP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that F28P650DK6PZP meets industry standards.
7.What is the process for return or replacement of F28P650DK6PZP?
All F28P650DK6PZP units undergo pre-shipment inspection (PSI). If there is an issue with F28P650DK6PZP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The F28P650DK6PZP part is unused and in its original packaging.
Return procedure for F28P650DK6PZP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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