Texas Instruments F28P650DK9NMRR
- Part No.:
- F28P650DK9NMRR
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 169-VFBGA
- Datasheet:
-
F28P650DK9NMRR.pdf
- Description:
- C2000 32-BIT MCU, 2X C28X+CLA CP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
F28P650DK9NMRR from Texas Instruments is a dual-C28x DSP + CLA real-time microcontroller for high-precision power electronics control, featuring 200MHz C28x CPUs (CPU1 & CPU2), IEEE 754 double-precision FPU, 1.28MB ECC-protected flash, and EtherCAT SubDevice Controller - deployed in servo drives, string inverters, and EV DC fast chargers.
For engineers reviewing the F28P650DK9NMRR datasheet, F28P650DK9NMRR pinout, F28P650DK9NMRR application, or F28P650DK9NMRR equivalent, key selection criteria include lockstep CPU2 support, 36-channel HRPWM with MINDB/ICL logic, hardware ADC redundancy for functional safety, and ZEJ 256-ball nFBGA packaging with 13mm × 13mm footprint.
Technical Context
The F28P650DK9NMRR implements a deterministic real-time architecture with two independent 200MHz C28x DSP cores and one 200MHz CLA, enabling parallel execution of control law computation and system management. Its analog subsystem integrates three 16-bit/12-bit ADCs (1.19MSPS @ 16-bit), 11 windowed comparators with slope-compensated DAC references, and hardware oversampling up to 128×.
Control peripherals include 36 ePWM channels with 150ps resolution, seven eCAP modules (two with HRCAP), six eQEP units, and 16 SDFM input channels. The device supports EtherCAT SubDevice operation, dual CAN FD, USB 2.0, FSI (200Mbps), and configurable logic block (CLB) with six tiles for FPGA-like peripheral augmentation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Architecture | Dual 32-bit C28x DSP + single CLA, all at 200MHz - enables concurrent real-time signal processing and control law execution without CPU contention. |
| Flash Memory | 1.28MB ECC-protected CPU-mappable flash across 5 banks - supports live firmware update (LFU) with zero-downtime context switching. |
| ADC Performance | Three 16-bit/12-bit ADCs: 1.19MSPS (16-bit) or 3.92MSPS (12-bit), 40 SE/19 diff inputs, hardware post-processing - eliminates need for external oversampling or averaging logic. |
| PWM Capability | 36 ePWM channels, all with 150ps high-resolution, MINDB and ICL logic - enables direct control of multilevel, matrix, and resonant converters without external dead-time ICs. |
| Safety Features | Lockstep on C28x CPU2, MPOST, HWBIST, reciprocal ADC comparison, ASIL B/SIL 2 certified - meets ISO 26262 and IEC 61508 requirements for functional safety systems. |
| Package | 256-ball nFBGA (ZEJ), 13mm × 13mm, 0.8mm pitch - optimized for thermal dissipation in high-power density motor drive and inverter PCB layouts. |
| Operating Temp | –40°C to 125°C ambient - qualified for industrial and automotive under-hood environments including HVAC compressor modules and traction inverters. |
Pinout & Package
Package: 256-ball New Fine Pitch Ball Grid Array (nFBGA), ZEJ suffix, 13mm × 13mm, 0.8mm pitch, lead-free/green compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDA / VSSA | Analog power supply / ground | Separate 3.3V analog domain with dedicated low-noise routing - preserves ADC/DAC accuracy in noisy power stage environments. |
| A0/DACA_OUT | 12-bit buffered DAC output | Provides slope-compensated reference for peak/valley current mode control - directly interfaces with comparator subsystem (CMPSS) for PWM modulation. |
| B0/VDAC / B1/DACC_OUT | Second DAC output pair | Enables dual-loop control (e.g., voltage + current) or redundant safety monitoring - supports functional safety architectures requiring cross-checking. |
| A9–A11, GPIO212–214 | General-purpose I/O with ADC input capability | 185 total GPIO pins, 22 with AGPIO function - allows flexible sensor interface mapping (e.g., phase current, bus voltage, temperature) without external muxing. |
| TCK/TDO/TDI/TMS | JTAG debug interface | IEEE 1149.1-compliant boundary scan - enables in-circuit debugging, flash programming, and security lock verification during production test. |
Key Features
| Feature | Design Value |
|---|---|
| Live Firmware Update (LFU) | Hardware-accelerated context switch between old/new firmware images - enables field updates without power cycle or service interruption in critical infrastructure. |
| Configurable Logic Block (CLB) | Six programmable logic tiles integrated into peripheral interconnect - replaces external CPLD/FPGA for encoder interfaces, custom PWM generation, or protection logic. |
| EtherCAT SubDevice Controller | Integrated ESC supporting distributed clocks and process data exchange - reduces host processor load and simplifies real-time motion control network implementation. |
| Hardware ADC Redundancy Checker | Automatic comparison of conversion results across multiple ADC modules - detects transient faults without consuming CPU cycles, satisfying ASIL B diagnostic coverage requirements. |
| Fast Serial Interface (FSI) | 200Mbps isolated serial link with TX/RX differential pairs - enables robust, high-bandwidth communication across galvanic isolation barriers in high-voltage inverters. |
Applications
| Servo Drive Control Module | String Inverter |
|---|---|
Use Scenario: High-bandwidth position/velocity/torque control in industrial robotic arms using dual-loop feedback. IC Role / Device Role / Timing Role: Real-time controller executing field-oriented control (FOC), space vector modulation (SVM), and safety monitoring in <1µs loop time. Use Value: Dual C28x + CLA architecture delivers 1000MHz-equivalent signal chain performance, enabling >20kHz PWM switching for low acoustic noise and high efficiency. | Use Scenario: Distributed MPPT and DC-AC conversion in rooftop solar installations with panel-level optimization. IC Role / Device Role / Timing Role: Central controller managing interleaved boost stages, grid-synchronization, anti-islanding, and communication via FSI/EtherCAT. Use Value: Hardware ADC oversampling (128×) and built-in CRC engines reduce external component count while meeting IEC 61000-3-2 harmonic compliance. |
| EV DC Fast Charging Station | Automotive HVAC Compressor Module |
Use Scenario: Bidirectional AC-DC and DC-DC power conversion in 150kW+ charging systems with liquid-cooled modules. IC Role / Device Role / Timing Role: Primary controller for SiC/GaN gate driver timing, thermal derating, fault response (<2µs), and CAN FD communication with BMS. Use Value: 36-channel HRPWM with MINDB logic ensures precise dead-time control across multi-phase topologies, minimizing shoot-through risk at 200kHz switching. | Use Scenario: Variable-speed compressor control in electric vehicle climate systems with refrigerant pressure and cabin temperature feedback. IC Role / Device Role / Timing Role: Safety-certified MCU managing motor commutation, refrigerant flow regulation, and ASIL-B diagnostics per ISO 26262. Use Value: Lockstep CPU2 and hardware ADC redundancy checker provide systematic fault detection coverage exceeding ASIL B requirements without software overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar real-time control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320F28379D | Dual C28x+CLA at 200MHz, 1MB flash, no EtherCAT ESC, no lockstep CPU2, 176-pin PTP package | Lacks ASIL B certification path and EtherCAT support - suitable for non-safety-critical industrial drives without deterministic network requirements | Select when cost-sensitive designs omit functional safety and industrial Ethernet needs but require comparable compute density. |
| TMS320F28P650DK8 | Same die, identical peripherals and memory, but lacks EtherCAT SubDevice Controller and lockstep CPU2 | Not certified for ASIL B/SIL 2; cannot serve as EtherCAT node - limited to standalone motor control or non-networked power conversion | Choose for lower-cost variants where EtherCAT integration and dual-CPU lockstep are not required in final system architecture. |
Compared with TMS320F28379D and F28P650DK8, the F28P650DK9NMRR uniquely combines ASIL B-certified lockstep operation, integrated EtherCAT ESC, and 1.28MB flash - making it the only option among the three qualified for safety-critical, networked real-time control in automotive and industrial infrastructure.
Availability
F28P650DK9NMRR is available at Aetrix Electronics and suitable for servo drive control modules, string inverters, and EV DC fast charging stations requiring stable component supply across extended product lifecycles.
Supply support for F28P650DK9NMRR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and power electronics markets.
The TMS320F28P65x product line targets ultra-low-latency real-time control in high-efficiency power conversion systems - specifically engineered for GaN/SiC-based motor drives, solar inverters, and EV charging infrastructure demanding deterministic timing and functional safety.
FAQ
What is the core architecture of the F28P650DK9NMRR?
The F28P650DK9NMRR features two independent 32-bit C28x DSP CPUs and one Control Law Accelerator (CLA), all operating at 200MHz. Each C28x core includes IEEE 754 double-precision FPU, TMU, and VCRC engine. The CLA executes floating-point control laws independently, delivering 600 MIPS total processing capability. This architecture is implemented in the F28P650DK9NMRR to enable simultaneous high-speed signal processing and real-time decision-making in power electronics applications.
Does the F28P650DK9NMRR support functional safety certification?
Yes, the F28P650DK9NMRR is ISO 26262 certified up to ASIL B by TÜV SÜD and IEC 61508 certified up to SIL 2. It includes lockstep operation on C28x CPU2, hardware memory self-test (MPOST), built-in self-test (HWBIST), and reciprocal ADC comparison logic. These features are integral to the F28P650DK9NMRR silicon design and documented in TI's Industrial and Automotive Functional Safety documentation packages.
What package type and pin count does the F28P650DK9NMRR use?
The F28P650DK9NMRR uses a 256-ball New Fine Pitch Ball Grid Array (nFBGA) package with ZEJ suffix, measuring 13mm × 13mm with 0.8mm ball pitch. This package is confirmed in TI's Device Information table and Mechanical, Packaging, and Orderable Information section. The F28P650DK9NMRR's pinout supports 185 GPIOs, three ADCs, dual CAN FD, EtherCAT, and FSI - all mapped to the ZEJ ball grid.
How does the F28P650DK9NMRR handle firmware updates in the field?
The F28P650DK9NMRR implements Live Firmware Update (LFU) with hardware acceleration for zero-downtime context switching between active and standby firmware images stored in its 1.28MB ECC-protected flash. LFU supports both cold boot and hot swap modes, enabling seamless updates without power cycling - a capability verified in TI's F28P65x Technical Reference Manual and leveraged in mission-critical F28P650DK9NMRR deployments like grid-tied inverters.
What communication interfaces are integrated into the F28P650DK9NMRR?
The F28P650DK9NMRR integrates EtherCAT SubDevice Controller, two CAN FD controllers, USB 2.0 (MAC+PHY), Fast Serial Interface (FSI) with 200Mbps throughput, four SPI ports, two UARTs (25Mbps), two I2C interfaces (400Kbps), two LIN modules, and PMBus. All are silicon-verified peripherals in the F28P650DK9NMRR, enabling mixed-criticality networking in industrial automation and automotive systems.
F28P650DK9NMRR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 169-VFBGA
- Series:
- C2000™ C28x Piccolo™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- C28x
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 200MHz
- Connectivity:
- CANbus, Ethernet, I2C, SCI, SPI, UART/USART, USB
- Peripherals:
- AES, Brown-out Detect/Reset, DMA, POR, PWM, WDT
- Number of I/O:
- 98
- Program Memory Size:
- 1.28MB (1.28M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 248K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.8V ~ 3.63V
- Data Converters:
- A/D 34x12/16b SAR; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
F28P650DK9NMRR FAQ
1.How can I place an order for F28P650DK9NMRR through Aetrix?
Please submit a Request for Quotation (RFQ) for F28P650DK9NMRR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for F28P650DK9NMRR reliable?
The price and inventory of F28P650DK9NMRR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for F28P650DK9NMRR is usually 5 days.
3.What payment methods are accepted for F28P650DK9NMRR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for F28P650DK9NMRR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for F28P650DK9NMRR?
F28P650DK9NMRR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your F28P650DK9NMRR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for F28P650DK9NMRR?
For technical support, including F28P650DK9NMRR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your F28P650DK9NMRR requirements.
6.How does Aetrix verify that F28P650DK9NMRR is sourced from the original manufacturer or authorized distributors?
All F28P650DK9NMRR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that F28P650DK9NMRR meets industry standards.
7.What is the process for return or replacement of F28P650DK9NMRR?
All F28P650DK9NMRR units undergo pre-shipment inspection (PSI). If there is an issue with F28P650DK9NMRR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The F28P650DK9NMRR part is unused and in its original packaging.
Return procedure for F28P650DK9NMRR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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