My Inquiry
My Account
onsemi FAN53526UC106X
- Part No.:
- FAN53526UC106X
- Manufacturer:
- onsemi
- Package:
- 15-UFBGA, WLCSP
- Datasheet:
-
FAN53526UC106X.pdf
- Description:
- IC REG BUCK PROG 3A 15WLCSP
- Quantity:
- Payment:
- Shipping:
Inventory:3,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
FAN53526UC106X from onsemi is a digitally programmable 3.0 A synchronous step-down DC-DC regulator with I²C interface, 2.4 MHz fixed switching frequency, 2.5 V–5.5 V input range, and factory-default 1.2625 V output voltage-designed for core power delivery in mobile application processors including ARM and Tegra platforms.
For engineers reviewing the FAN53526UC106X datasheet, pinout, applications, or equivalent options, key selection criteria include I²C-programmable 6.25 mV-step output (0.600–1.39375 V), PFM/PWM auto-mode transition, 50 µA quiescent current in light-load PFM mode, and WLCSP-15 package compatibility with high-density portable PCB layouts.
Technical Context
The FAN53526UC106X implements a proprietary non-linear fixed-frequency PWM modulator with synchronous rectification, enabling fast load transient response independent of output capacitor ESR. Its 2.4 MHz nominal switching frequency supports compact 330 nH inductors and ceramic output capacitors while maintaining >80% efficiency from 10 mA to 3.0 A.
Operation dynamically shifts between continuous conduction mode (CCM) at medium-to-heavy loads and discontinuous conduction mode (DCM) single-pulse PFM at light loads. The VSEL pin selects between two preloaded register sets (VSEL0/VSEL1), and the MODE bits in Control Register 02h determine whether PFM is enabled or forced PWM is active-enabling precise trade-offs between efficiency and ripple/noise control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3.0 A continuous-supports SoC core rails requiring stable high-current delivery without thermal derating under typical mobile ambient conditions. |
| Switching Frequency | 2.4 MHz nominal-enables use of sub-1 µH inductors and low-ESR ceramic capacitors, reducing solution footprint by >40% vs. 500 kHz alternatives. |
| I²C Interface Speed | Up to 3.4 Mbps (High-Speed Mode)-allows dynamic voltage scaling (DVS) updates within microseconds during processor DVFS transitions. |
| Output Voltage Range | 0.600 V to 1.39375 V in 6.25 mV steps-covers ARM Cortex-A series, Tegra, OMAP, and LPDDR3/4 VDDQ requirements with ±2.5% DC regulation accuracy. |
| Quiescent Current | 50 µA typical in PFM mode-minimizes battery drain during system idle/suspend states in smartphones and tablets. |
| Input Voltage Range | 2.5 V to 5.5 V-compatible with single-cell Li-ion (3.0–4.2 V), USB PD (5 V), and boosted battery rails without external pre-regulation. |
| Protection Features | UVLO (2.45 V typ), thermal shutdown (150 °C), overvoltage lockout (6.2 V), and peak current limit (4.75 A typ)-ensures robust operation across voltage transients and fault conditions. |
Pinout & Package
Package: 15-bump Wafer-Level Chip Scale Package (WLCSP), 1.310 mm × 2.015 mm, 0.4 mm ball pitch, case 567QS.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (A1, B1, C1) | Power Input | Accepts 2.5–5.5 V supply; requires local 4.7 µF X5R 0603 decoupling with minimal loop area to PGND pins. |
| SW (A2, B2) | Switching Node | Connects directly to inductor; high dV/dt node-must be routed short and away from sensitive analog traces. |
| VOUT (E3) | Regulated Output | Feedback and output sense point; connects to COUT bank and load; internal 1% resistor divider referenced to AGND. |
| PGND (A3, B3, C2) | Power Ground | Low-side MOSFET source return; must tie CIN/COUT ground vias directly here to minimize switching noise coupling. |
| AGND (C3, E1) | Analog Ground | Reference for I²C, VSEL, EN, and internal DAC; isolated from PGND except at single-point star connection near IC. |
| EN (D2) | Enable Control | Active-high logic input; internal 250 kΩ pull-down-driven HIGH to activate regulator; retains register state in shutdown. |
| VSEL (D1) | Voltage Select | Selects between VSEL0 (1.2625 V default) and VSEL1 registers; logic level determines auto-PFM vs. forced PWM mode with MODE bits. |
| SCL (E2) | I²C Clock | Input-only clock line; supports Standard/Fast/Fast-Plus/High-Speed modes up to 3.4 MHz; tie to AGND if unused. |
| SDA (D3) | I²C Data | Open-drain bidirectional data line; requires external pull-up; supports ACK/NACK and repeated START for read/write sequences. |
Key Features
| Feature | Design Value |
|---|---|
| Digitally programmable output | 0.600–1.39375 V in 6.25 mV steps via I²C-enables precise DVS for multi-core SoCs without external resistive dividers. |
| Programmable slew rate | Eight selectable rates (0.5–64 mV/s) for controlled voltage transitions-prevents overshoot/undershoot during dynamic frequency scaling. |
| Auto PFM/PWM mode | Seamless transition between high-efficiency PFM (50 µA IQ) and low-noise PWM (2.4 MHz)-optimized for bursty mobile workloads. |
| Integrated protection | UVLO, OVP (6.2 V), thermal shutdown (150 °C), and cycle-by-cycle current limiting (4.75 A peak)-eliminates need for external fault management circuitry. |
| Soft-start & discharge control | 150 µs soft-start ramp + optional internal 11 Ω VOUT discharge path-ensures safe power sequencing and prevents floating rail issues. |
Applications
| Application 1 | Application 2 |
|---|---|
Use Scenario: Core voltage supply for ARM-based application processors (e.g., Cortex-A76/A78) in smartphones during DVFS transitions. IC Role / Device Role / Timing Role: Primary buck regulator delivering dynamically scaled VDD_CPU with sub-100 ns load step response and <±16 mV transient deviation. Use Value: Enables energy-efficient performance scaling while maintaining timing margin integrity across P-state changes. | Use Scenario: I/O and memory rail for LPDDR4 interfaces in ultra-thin tablets. IC Role / Device Role / Timing Role: Low-noise, high-PSRR point-of-load regulator supplying VDDQ at 1.1 V with tight ±2.5% DC accuracy and <50 mV load transient deviation. Use Value: Prevents signal integrity degradation and timing violations during high-speed DDR write bursts. |
| Application 3 | Application 4 |
Use Scenario: GPU core power in gaming handhelds with thermally constrained enclosures. IC Role / Device Role / Timing Role: High-current (3.0 A) synchronous buck operating in forced PWM mode to suppress audible coil whine and ensure stable clock domain operation. Use Value: Delivers consistent GPU performance without efficiency penalty from PFM-induced frequency jitter. | Use Scenario: Power management for Tegra SoC-based automotive infotainment displays. IC Role / Device Role / Timing Role: Automotive-grade (−40 °C to +85 °C) programmable buck regulating display controller VDD with I²C-based firmware-controlled voltage tuning. Use Value: Supports field-upgradable display brightness/power profiles without hardware revision. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62864DRLR | 2.5–5.5 V input, 3 A, 2.4 MHz, I²C programmable (0.3–1.5375 V), 25 µA IQ in PFM | Lower quiescent current but narrower output range; no VSEL pin for hardware-selectable defaults | Preferred when ultra-low IQ dominates design priority and full 0.6–1.39375 V range is not required. |
| RTQ2132BGQW | 2.7–5.5 V input, 3 A, 2.2 MHz, I²C programmable (0.5–1.5 V), 35 µA IQ, integrated power-good | Includes dedicated PGOOD pin and slightly lower max input; different register map and slave address (0x60) | Chosen when system-level power sequencing validation requires explicit PGOOD assertion before SoC boot. |
Compared with TPS62864DRLR and RTQ2132BGQW, the FAN53526UC106X offers the widest digitally programmable output range (0.600–1.39375 V) and factory-default 1.2625 V setting aligned with common ARM core voltages-making it optimal for direct drop-in integration into existing mobile reference designs without firmware rework.
Availability
FAN53526UC106X is available at Aetrix Electronics and suitable for smartphone SoC core power, LPDDR4 memory rail regulation, and automotive infotainment display subsystems requiring stable component supply and long-term production continuity.
Supply support for FAN53526UC106X includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient silicon solutions for automotive, industrial, cloud, medical, and edge applications-with leadership in power management, imaging, and intelligent sensing.
The FAN53526UC106X belongs to onsemi's TinyBuck family of ultra-compact, high-efficiency DC-DC regulators designed specifically for space-constrained, battery-powered mobile and portable electronics requiring dynamic voltage scaling and low-quiescent-current operation.
FAQ
What is the factory-default output voltage of the FAN53526UC106X?
The FAN53526UC106X ships with a factory-default output voltage of 1.2625 V, set by the VSEL0 register. This value is loaded automatically when the VSEL pin is held LOW at power-on reset and aligns with common ARM processor core voltage requirements. The voltage can be reprogrammed in-circuit via I²C to any value between 0.600 V and 1.39375 V in 6.25 mV increments.
Does the FAN53526UC106X support forced PWM mode, and how is it enabled?
Yes, the FAN53526UC106X supports forced PWM mode to eliminate PFM-related frequency variation and noise. It is enabled by setting the MODE bits in Control Register 02h to '10' and asserting the VSEL pin HIGH-or by setting MODE to '01' with VSEL LOW. In forced PWM mode, the regulator operates continuously at 2.4 MHz regardless of load, improving EMI predictability for noise-sensitive applications.
What is the I²C slave address of the FAN53526UC106X, and is it configurable?
The FAN53526UC106X has a fixed I²C slave address of 0xC0 (7-bit address 0x60, with R/W bit appended). This address is hard-coded and not user-configurable. It matches the default address used across most FAN53526 variants except FAN53526UC168X (0xC2). No external address pins or configuration registers exist to modify this value.
How does the FAN53526UC106X handle output voltage transitions, and can the slew rate be controlled?
The FAN53526UC106X provides eight programmable positive-voltage-transition slew rates-from 0.5 mV/s to 64 mV/s-via the SLEW bits (bits 6:4) in Control Register 02h. This allows precise control of voltage ramping during DVFS events to prevent overshoot or undershoot. Negative transitions rely on load discharge and are not slew-rate limited; the IC halts switching until the target voltage is reached.
What thermal and electrical protections are built into the FAN53526UC106X?
The FAN53526UC106X integrates under-voltage lockout (UVLO at 2.45 V), input overvoltage protection (OVP at 6.2 V), cycle-by-cycle peak current limiting (4.75 A typical), and thermal shutdown (150 °C with 17 °C hysteresis). These protections operate autonomously without host intervention, ensuring safe operation during input transients, short circuits, or sustained overload conditions-critical for unattended mobile and automotive deployments.
FAN53526UC106X Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- TinyBuck®
- Package/Case:
- 15-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.26V
- Voltage - Output (Max):
- 1.26V
- Current - Output:
- 3A
- Frequency - Switching:
- 2.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-WLCSP (2.02x1.31)
FAN53526UC106X FAQ
1.How can I place an order for FAN53526UC106X through Aetrix?
Please submit a Request for Quotation (RFQ) for FAN53526UC106X on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for FAN53526UC106X reliable?
The price and inventory of FAN53526UC106X are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for FAN53526UC106X is usually 5 days.
3.What payment methods are accepted for FAN53526UC106X?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for FAN53526UC106X transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for FAN53526UC106X?
FAN53526UC106X orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your FAN53526UC106X order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for FAN53526UC106X?
For technical support, including FAN53526UC106X datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your FAN53526UC106X requirements.
6.How does Aetrix verify that FAN53526UC106X is sourced from the original manufacturer or authorized distributors?
All FAN53526UC106X products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that FAN53526UC106X meets industry standards.
7.What is the process for return or replacement of FAN53526UC106X?
All FAN53526UC106X units undergo pre-shipment inspection (PSI). If there is an issue with FAN53526UC106X, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The FAN53526UC106X part is unused and in its original packaging.
Return procedure for FAN53526UC106X:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
FAN53526UC106X Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
