My Inquiry
My Account
onsemi FAN53526UC288X
- Part No.:
- FAN53526UC288X
- Manufacturer:
- onsemi
- Package:
- 15-UFBGA, WLCSP
- Datasheet:
-
FAN53526UC288X.pdf
- Description:
- IC REG BUCK PROG 3A 15WLCSP
- Quantity:
- Payment:
- Shipping:
Inventory:3,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
FAN53526UC288X from onsemi is a digitally programmable 3.0 A synchronous step-down DC-DC regulator with I²C interface, operating at 2.4 MHz fixed frequency and delivering 1.15 V output (power-up default) across 2.5–5.5 V input. It supports 6.25 mV programmable voltage steps from 0.600 V to 1.39375 V and achieves >80% efficiency from 10 mA to 3.0 A load - deployed in mobile SoC core power delivery for ARM/Tegra processors.
For engineers reviewing the FAN53526UC288X datasheet, pinout, applications, or equivalent options, key selection criteria include its WLCSP-15 package footprint, I²C slave address C2h, PFM/PWM auto-mode transition behavior, and verified 50 µA quiescent current in light-load operation.
Technical Context
The FAN53526UC288X implements a proprietary non-linear fixed-frequency PWM modulator with synchronous rectification, enabling stable 2.4 MHz switching independent of input voltage and load current. Its architecture eliminates ESR dependency, allowing full compatibility with low-ESR ceramic output capacitors.
It integrates dual-mode control: automatic PFM/PWM mode (enabled by VSEL pin logic and MODE bits) for high efficiency at light loads, and forced PWM mode for consistent ripple and timing predictability. Voltage transitions are slew-rate programmable (0.5–64 mV/s), and output discharge is software-controllable via OUTPUT_DISCHARGE bit.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3.0 A continuous - supports full-core active states in mobile APs without thermal derating under typical PCB layout. |
| Switching Frequency | 2.4 MHz nominal - enables use of compact 330 nH inductors and reduces EMI fundamental below 30 MHz. |
| Input Voltage Range | 2.5 V to 5.5 V - compatible with single-cell Li-ion (3.0–4.2 V) and USB-powered systems. |
| Output Voltage Range | 0.600 V to 1.39375 V in 6.25 mV steps - covers ARM Cortex-A/Little cores, LPDDR3/4 I/O, and GPU voltage domains. |
| I²C Interface Speed | Up to 3.4 Mbps (High-Speed Mode) - enables dynamic DVFS updates within <10 µs per register write. |
| Quiescent Current | 50 µA typical in PFM mode - extends battery runtime during display-off or deep-sleep states. |
| Thermal Shutdown | 150 °C with 17 °C hysteresis - protects die integrity during sustained 3 A load under poor airflow or high ambient. |
Pinout & Package
Package: 15-bump Wafer-Level Chip Scale Package (WLCSP), 1.310 mm × 2.015 mm, 0.4 mm ball pitch, case 567QS.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (A1, B1, C1) | Power Input | Accepts 2.5–5.5 V supply; requires local 4.7 µF ceramic decoupling with minimal loop area to PGND. |
| SW (A2, B2) | Switching Node | Connects directly to inductor; high dV/dt node requiring tight routing and no stubs to minimize EMI. |
| VOUT (E3) | Regulated Output | Feedback and output sense point; must connect to COUT bank with shortest possible path to AGND/PGND. |
| PGND (A3, B3, C2) | Power Ground | Reference for low-side MOSFET and high-current return path; separate from AGND to avoid noise coupling. |
| AGND (C3, E1) | Analog Ground | Reference for I²C, VSEL, EN, and internal regulation circuitry; must be isolated from PGND except at single-point star. |
| EN (D2) | Enable Control | Active-high digital enable with 250 kΩ internal pull-down; supports hardware shutdown with <1 µA leakage in OFF state. |
| VSEL (D1) | Voltage Select | Selects between VSEL0/VSEL1 register banks; configures Auto PFM/PWM or Forced PWM mode with MODE bits. |
| SCL (E2) | I²C Clock Input | Accepts up to 3.4 MHz clock; requires external pull-up to VIN or VDDIO (1.8–3.3 V) per I²C bus requirements. |
| SDA (D3) | I²C Data Bidirectional | Open-drain I²C data line; shares same pull-up as SCL and must be routed away from noisy SW/VIN traces. |
Key Features
| Feature | Design Value |
|---|---|
| Digitally Programmable Output | 7-bit DAC resolution (128 steps) with 6.25 mV granularity enables precise DVFS tuning for SoC core rail optimization. |
| Load Transient Response | ±50 mV deviation for 0.01 A → 1.5 A step (200 ns edge) - maintains CPU stability during burst workload transitions. |
| PFM/PWM Seamless Transition | No audible switching noise or regulation discontinuity when crossing ~150 mA threshold - critical for audio-sensitive mobile designs. |
| Programmable Slew Rate | Eight selectable rates (0.5–64 mV/s) prevent overshoot/undershoot during dynamic voltage scaling sequences. |
| Integrated Protection | UVLO (2.45 V threshold), OVP (6.15 V shutdown), thermal shutdown (150 °C), and peak current limit (4.75 A) ensure robust field reliability. |
Applications
| Mobile Application Processor Core Power | LPDDR3/LPDDR4 Memory I/O Supply |
|---|---|
|
Use Scenario: Dynamic voltage and frequency scaling (DVFS) for ARM Cortex-A78/A55 clusters in smartphones and tablets. IC Role / Device Role / Timing Role: Primary core rail regulator with real-time I²C reprogramming synchronized to CPU governor events. Use Value: Enables 1.15 V operation per Table 1 (FAN53526UC288X default), reducing dynamic power by ~13% vs. fixed 1.2 V solutions. |
Use Scenario: Providing tightly regulated 1.2 V or 1.1 V I/O supply to LPDDR3/LPDDR4 memory subsystems. IC Role / Device Role / Timing Role: Low-noise, fast-transient buck converter placed adjacent to memory package for minimal loop inductance. Use Value: Delivers ±2.5% DC accuracy and ±50 mV transient response - meets JEDEC JESD209-4B VDDQ tolerance requirements. |
| Ultra-Mobile PC SoC Auxiliary Rail | Gaming Handheld GPU Core Supply |
|
Use Scenario: Powering auxiliary logic, display interface, or ISP blocks in fanless ultra-mobile PCs with strict thermal envelope. IC Role / Device Role / Timing Role: Secondary high-efficiency regulator operating in PFM mode during idle, switching to PWM under compute load. Use Value: 50 µA quiescent current extends standby time; 2.4 MHz switching avoids AM/FM radio band interference. |
Use Scenario: Delivering scalable GPU core voltage (e.g., 0.8–1.1 V) in portable gaming devices with thermal throttling constraints. IC Role / Device Role / Timing Role: Digitally tuned power stage responding to GPU driver voltage requests via I²C during frame rendering. Use Value: Programmable slew rate prevents GPU voltage droop-induced frame stutter during rapid clock ramping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally programmable buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS628641RQYR | 3.0 A, 2.5 MHz, I²C interface, but only 0.3–1.5 V output range; no VSEL pin; uses PMBus v1.3 protocol. | Requires PMBus-aware host firmware; lacks hardware VSEL mode selection; higher minimum output limits low-voltage SoC support. | Prefer when PMBus ecosystem integration is required and 0.6 V startup is not needed. |
| RTQ2134BGQW | 3.0 A, 2.2 MHz, I²C-compatible, 0.6–1.4 V output, but no programmable slew rate or output discharge control. | Lacks dynamic transition control features; fixed PFM/PWM boundary; lower I²C max speed (1 MHz). | Choose for cost-sensitive designs where voltage transition sequencing is handled externally. |
Compared with TPS628641RQYR and RTQ2134BGQW, the FAN53526UC288X uniquely combines VSEL hardware mode selection, eight-step slew rate control, and 3.4 Mbps I²C - making it optimal for tightly coupled DVFS in ARM-based mobile platforms where timing predictability and low-voltage flexibility are critical.
Availability
FAN53526UC288X is available at Aetrix Electronics and suitable for mobile processor core power, LPDDR memory I/O supply, and ultra-mobile PC auxiliary rail applications requiring stable component supply and long-term design-in support.
Supply support for FAN53526UC288X includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The FAN53526 series was designed specifically for high-density, low-voltage, high-current power delivery in space-constrained mobile and portable electronics - emphasizing digital programmability, ultra-low quiescent current, and seamless PFM/PWM operation.
FAQ
What is the default output voltage of the FAN53526UC288X at power-up?
The FAN53526UC288X powers up with a default output voltage of 1.15 V, as specified in Table 1 of the datasheet for this specific orderable part number. This value is stored in the VSEL0 register and is active when the VSEL pin is held low. The device retains register contents during hardware shutdown (EN = LOW), so subsequent startups maintain the last programmed voltage unless reset via the CONTROL register's RESET bit.
Does the FAN53526UC288X support I²C High-Speed Mode, and what is its slave address?
Yes, the FAN53526UC288X supports I²C High-Speed Mode up to 3.4 Mbps. Its I²C slave address is 0xC2 (7-bit address 0x61 with R/W bit), confirmed in Table 12 of the datasheet. This differs from other variants like FAN53526UC89X (C0h), and must be correctly configured in host firmware to avoid communication failure.
How does the FAN53526UC288X handle output voltage transitions, and can the slew rate be controlled?
The FAN53526UC288X supports programmable positive voltage transition slew rates via the SLEW bits (bits 6:4) in the CONTROL register (address 02h). Eight discrete rates from 0.5 mV/s to 64 mV/s are available - enabling precise control over voltage ramping to prevent system-level instability during DVFS. Negative transitions rely on load discharge and are not slew-limited.
What protection features are integrated into the FAN53526UC288X?
The FAN53526UC288X integrates input under-voltage lockout (UVLO, 2.45 V threshold), input over-voltage protection (OVP, 6.15 V shutdown), thermal shutdown (150 °C with 17 °C hysteresis), and peak current limiting (4.75 A typical). These functions operate autonomously without host intervention, ensuring safe operation during fault conditions including short-circuit, overtemperature, and input rail anomalies.
Is the FAN53526UC288X still recommended for new designs, and what is its lifecycle status?
No - according to Table 1 (Ordering Information) on page 2 of the datasheet, FAN53526UC288X is marked "DISCONTINUED" and "not recommended for new design." While available through Aetrix Electronics for legacy support and existing production, engineers should consult onsemi for qualified replacements such as the FAN53526UC84X (C0h address) or next-generation alternatives before initiating new designs.
FAN53526UC288X Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- TinyBuck®
- Package/Case:
- 15-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 1.39375V
- Current - Output:
- 3A
- Frequency - Switching:
- 2.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-WLCSP (2.02x1.31)
FAN53526UC288X FAQ
1.How can I place an order for FAN53526UC288X through Aetrix?
Please submit a Request for Quotation (RFQ) for FAN53526UC288X on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for FAN53526UC288X reliable?
The price and inventory of FAN53526UC288X are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for FAN53526UC288X is usually 5 days.
3.What payment methods are accepted for FAN53526UC288X?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for FAN53526UC288X transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for FAN53526UC288X?
FAN53526UC288X orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your FAN53526UC288X order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for FAN53526UC288X?
For technical support, including FAN53526UC288X datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your FAN53526UC288X requirements.
6.How does Aetrix verify that FAN53526UC288X is sourced from the original manufacturer or authorized distributors?
All FAN53526UC288X products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that FAN53526UC288X meets industry standards.
7.What is the process for return or replacement of FAN53526UC288X?
All FAN53526UC288X units undergo pre-shipment inspection (PSI). If there is an issue with FAN53526UC288X, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The FAN53526UC288X part is unused and in its original packaging.
Return procedure for FAN53526UC288X:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
FAN53526UC288X Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
