onsemi FAN53526UC89X
- Part No.:
- FAN53526UC89X
- Manufacturer:
- onsemi
- Package:
- 15-UFBGA, WLCSP
- Datasheet:
-
FAN53526UC89X.pdf
- Description:
- IC REG BUCK PROG 3A 15WLCSP
- Quantity:
- Payment:

- Shipping:

Inventory:5,693
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
FAN53526UC89X from onsemi is a digitally programmable 3.0 A synchronous step-down DC-DC regulator with I²C interface, operating at 2.4 MHz fixed frequency and delivering 1.15625 V output by default. It supports 2.5–5.5 V input, achieves >80% efficiency from 10 mA to 3.0 A load, and integrates PFM/PWM auto-mode switching for ultra-low quiescent current (50 µA typical) in light-load conditions - ideal for powering ARM/Tegra application processors and LPDDR memory rails.
For engineers reviewing the FAN53526UC89X datasheet, pinout, applications, or equivalent options, key selection criteria include its 6.25 mV programmable output resolution (0.600–1.39375 V), 2.4 MHz switching frequency enabling compact 330 nH inductors, I²C slave address C0h, and WLCSP-15 package with integrated thermal/overcurrent protection.
Technical Context
The FAN53526UC89X uses a proprietary non-linear fixed-frequency PWM modulator with synchronous rectification, maintaining constant 2.4 MHz operation across input voltages (2.5–5.5 V) and loads (0–3.0 A) via an internal frequency loop. Its architecture eliminates ESR dependency, enabling stable regulation with low-ESR ceramic capacitors.
It implements dual-mode control: automatic transition between PFM (for <10 mA loads, 50 µA IQ) and forced PWM (for noise-sensitive or high-transient applications), selectable via MODE bits and VSEL pin logic. Voltage transitions are slew-rate programmable (0.5–64 mV/s) through register 02h, while hardware enable (EN) and software buck control (BUCK_ENx) provide layered power sequencing flexibility.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3.0 A continuous - supports high-current SoC core rails without external current sharing. |
| Switching Frequency | 2.4 MHz nominal - enables use of sub-1 µH inductors (e.g., 330 nH) and reduces solution footprint. |
| Input Voltage Range | 2.5 V to 5.5 V - compatible with single-cell Li-ion, USB, and intermediate bus supplies. |
| Programmable Output | 0.600 V to 1.39375 V in 6.25 mV steps - fine-grained DVS for dynamic processor voltage scaling. |
| I²C Interface Speed | Up to 3.4 Mbps (High-Speed Mode) - enables rapid voltage updates during runtime DVFS events. |
| Quiescent Current | 50 µA typical in PFM mode - extends battery life in always-on subsystems. |
| Protection Features | UVLO (2.45 V typ), OVP (6.15 V), thermal shutdown (150 °C), and peak current limit (4.75 A typ) - ensures robust operation under fault conditions. |
Pinout & Package
Package: 15-bump Wafer-Level Chip Scale Package (WLCSP), 1.310 mm × 2.015 mm, 0.4 mm ball pitch, case 567QS.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (A1, B1, C1) | Power Input | Connects to 2.5–5.5 V source; requires local 4.7 µF ceramic decoupling with minimal trace inductance. |
| SW (A2, B2) | Switching Node | Drives external 330 nH inductor; high dV/dt node requiring tight layout to PGND/AGND. |
| VOUT (E3) | Regulated Output | Sense point for feedback; connects directly to output capacitor bank (2×47 µF recommended). |
| PGND (A3, B3, C2) | Power Ground | Reference for low-side MOSFET and high-current return path; must be connected with shortest possible route to CIN/COUT ground pads. |
| AGND (C3, E1) | Analog Ground | Reference for I²C, control logic, and internal reference; isolated from PGND to prevent noise coupling. |
| EN (D2) | Enable Input | Active-high digital enable with internal 250 kΩ pull-down; supports hardware power sequencing. |
| VSEL (D1) | Voltage Select | Selects between VSEL0 (1.15625 V default) and VSEL1 registers; internal 250 kΩ pull-down active only when logic low. |
| SCL (E2) | I²C Clock | Input-only clock line; requires external pull-up to VIN or VDDIO; supports up to 3.4 MHz HS mode. |
| SDA (D3) | I²C Data | Open-drain bidirectional data line; requires external pull-up; ACK/NACK signaling enabled during transactions. |
Key Features
| Feature | Design Value |
|---|---|
| Digitally Programmable Output | 7-bit DAC resolution (0.600–1.39375 V @ 6.25 mV/step) enables precise DVS for ARM/Tegra cores without external resistors. |
| Adaptive PFM/PWM Control | Automatic mode switching maintains >80% efficiency from 10 mA to 3.0 A, eliminating manual mode selection in firmware. |
| Configurable Slew Rate | Eight programmable rates (0.5–64 mV/s) prevent overshoot/undershoot during voltage transitions in sensitive SoC domains. |
| Integrated Protection | UVLO, OVP, thermal shutdown (150 °C), and cycle-by-cycle current limiting (4.75 A typ) reduce need for external fault management circuitry. |
| Ultra-Small WLCSP | 1.31 × 2.02 mm footprint with 0.4 mm pitch allows placement directly beneath SoCs in space-constrained mobile PCBs. |
Applications
| Application 1 | Application 2 |
|---|---|
Use Scenario: Core voltage rail for ARM Cortex-A series application processors in smartphones and tablets. IC Role / Device Role / Timing Role: Primary buck regulator delivering dynamically scaled VDD_CORE with I²C-controlled DVS during performance state transitions. Use Value: 6.25 mV output resolution and 2.4 MHz switching enable fast, low-noise voltage changes matching CPU frequency scaling requirements. | Use Scenario: I/O supply for LPDDR3/LPDDR4 memory interfaces in ultra-mobile PCs and embedded systems. IC Role / Device Role / Timing Role: High-efficiency, low-ripple power source synchronized to memory controller timing constraints. Use Value: >80% efficiency at 10 mA–3.0 A load range and PFM mode reduce standby power while maintaining transient response for burst read/write operations. |
| Application 3 | Application 4 |
Use Scenario: Power delivery for GPU or DSP subsystems in gaming handhelds and portable media devices. IC Role / Device Role / Timing Role: Compact, thermally robust regulator handling high peak currents during graphics rendering bursts. Use Value: 3.0 A continuous rating and thermal shutdown (150 °C) ensure reliable operation under sustained GPU load without derating. | Use Scenario: Core rail for application-specific SoCs in industrial IoT edge nodes with battery backup. IC Role / Device Role / Timing Role: Low-quiescent-current regulator maintaining system wake-up capability during extended sleep cycles. Use Value: 50 µA typical IQ in PFM mode extends battery life while retaining full I²C programmability for remote voltage adjustment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS6286418RTER | 3.0 A, 2.0–5.5 V input, 1.8 V fixed output (non-programmable); I²C interface supports only enable/status, not voltage control. | Fixed-output use cases only; no DVS capability - unsuitable where dynamic voltage scaling is required. | Select when simplicity and cost outweigh programmability needs; verify compatibility with existing I²C bus timing. |
| RTQ2132BWGEED | 3.0 A, 2.5–5.5 V input, I²C-programmable 0.6–1.4 V output (6.25 mV steps); 2.2 MHz switching; includes PMBus v1.3 support. | Supports PMBus commands (e.g., READ_VOUT, WRITE_VOUT) and telemetry (temperature, voltage, current monitoring). | Choose when system-level power telemetry and standardized PMBus integration are required over onsemi's proprietary register map. |
Compared with TPS6286418RTER and RTQ2132BWGEED, the FAN53526UC89X uniquely combines 2.4 MHz operation, 50 µA PFM quiescent current, and dedicated slew-rate control - making it optimal for mobile SoC core rails demanding both efficiency and precise transient behavior.
Availability
FAN53526UC89X is available at Aetrix Electronics and suitable for smartphone power management, LPDDR memory regulation, and ARM-based application processor core rails requiring stable component supply and long-term production continuity.
Supply support for FAN53526UC89X includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient silicon solutions for automotive, industrial, cloud, medical, and edge applications.
The FAN53526UC89X belongs to onsemi's TinyBuck family of ultra-compact, high-frequency DC-DC regulators designed specifically for mobile and portable electronics requiring high efficiency, small size, and digital programmability.
FAQ
What is the default output voltage of the FAN53526UC89X at power-up?
The FAN53526UC89X powers up with a default output voltage of 1.15625 V, corresponding to the VSEL0 register value programmed at factory. This setting is confirmed in Table 1 of the datasheet and remains active when the VSEL pin is held low. The FAN53526UC89X retains this default until modified via I²C write to register 00h or by toggling VSEL high to select VSEL1.
Does the FAN53526UC89X support true I²C High-Speed Mode (3.4 Mbps)?
Yes, the FAN53526UC89X fully supports I²C High-Speed Mode up to 3.4 Mbps, as specified in Table 9 and the Operating Description section. It complies with HS Mode timing requirements including tRCL/tFCL ≤ 80 ns (CB ≤ 100 pF) and requires the master to send the HS master code (00001XXX) after START. The FAN53526UC89X slave address is C0h in HS Mode, identical to Fast Mode.
How does the FAN53526UC89X handle output voltage transitions between different setpoints?
The FAN53526UC89X supports programmable positive-transition slew rates (0.5–64 mV/s) via bits 6:4 in CONTROL register (02h). Negative transitions rely on load discharge; the IC stops switching until VOUT reaches the new setpoint. During transitions, the MONITOR register (05h) flags POS/NEG bits to indicate progress. The FAN53526UC89X ensures monotonicity and avoids undershoot/overshoot through controlled ramping.
What thermal protection mechanisms are implemented in the FAN53526UC89X?
The FAN53526UC89X incorporates thermal shutdown at 150 °C (typical) with 17 °C hysteresis, as defined in Table 8. When junction temperature exceeds this threshold, switching halts until temperature falls below 133 °C. The MONITOR register (bit 6) reports UVLO status but does not directly indicate thermal state; designers must infer thermal events from load derating or external temperature monitoring. The FAN53526UC89X also features θJA = 42 °C/W (simulated), requiring proper PCB copper area for thermal dissipation.
Can the FAN53526UC89X operate with only hardware enable (EN pin), without using I²C communication?
Yes, the FAN53526UC89X can operate solely with hardware enable: asserting EN high activates regulation using the default VSEL0 voltage (1.15625 V for FAN53526UC89X). All registers retain their values during EN low, and the part draws <1 µA in shutdown. I²C is optional for dynamic reconfiguration; basic on/off and fixed-voltage operation require only EN, VIN, and proper passive components. The FAN53526UC89X functions as a standalone regulator without I²C firmware overhead.
FAN53526UC89X Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- TinyBuck®
- Package/Case:
- 15-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.15V
- Voltage - Output (Max):
- 1.15V
- Current - Output:
- 3A
- Frequency - Switching:
- 2.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-WLCSP (2.02x1.31)
FAN53526UC89X FAQ
1.How can I place an order for FAN53526UC89X through Aetrix?
Please submit a Request for Quotation (RFQ) for FAN53526UC89X on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for FAN53526UC89X reliable?
The price and inventory of FAN53526UC89X are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for FAN53526UC89X is usually 5 days.
3.What payment methods are accepted for FAN53526UC89X?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for FAN53526UC89X transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for FAN53526UC89X?
FAN53526UC89X orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your FAN53526UC89X order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for FAN53526UC89X?
For technical support, including FAN53526UC89X datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your FAN53526UC89X requirements.
6.How does Aetrix verify that FAN53526UC89X is sourced from the original manufacturer or authorized distributors?
All FAN53526UC89X products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that FAN53526UC89X meets industry standards.
7.What is the process for return or replacement of FAN53526UC89X?
All FAN53526UC89X units undergo pre-shipment inspection (PSI). If there is an issue with FAN53526UC89X, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The FAN53526UC89X part is unused and in its original packaging.
Return procedure for FAN53526UC89X:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
FAN53526UC89X Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

