onsemi FAN65004B

Overview

FAN65004B from onsemi is a synchronous PWM buck regulator IC integrating controller, gate drivers, and high-side/low-side PowerTrench® MOSFETs in a single 6 × 6 mm PQFN package. It delivers up to 6 A continuous output current from a 4.5 V–65 V input, employs voltage-mode PWM control with input voltage feed-forward, and features 0.6 V ±0.67% reference accuracy for tight regulation in high-voltage POL applications.

For engineers reviewing the FAN65004B datasheet, pinout, applications, or equivalent options, this page provides verified technical context, confirmed pin functions, real-world application constraints (e.g., pre-bias startup, dual-LDO selection logic), and validated alternative options for high-input-voltage DC/DC conversion designs.

Technical Context

The FAN65004B implements fixed-frequency voltage-mode PWM control with VIN feed-forward compensation to maintain loop stability across its 4.5 V–65 V input range. Its error amplifier (80 dB DC gain, 10 MHz GBW) drives an external COMP network, enabling wide-bandwidth compensation for fast transient response in telecom and industrial supplies.

It integrates dual LDOs (LDO1 fed by HVBIAS, LDO2 fed by EXTBIAS) with automatic switchover at 4.7 V and hysteresis of 100 mV; LDO operation mode (switch vs. linear) depends on input voltage level relative to 5.4 V and is explicitly governed by Table 6 in the datasheet. Current protection uses cycle-by-cycle peak current limiting via ILIM resistor programming with scale factors of 59.3 A/Ω (HS) and 17.9 A/Ω (LS).

Key Specifications

Pinout & Package

Package: 6 mm × 6 mm PQFN-35 (Case 483BE), thermally enhanced with exposed PGND pad and multiple parallel VIN/PGND terminals for low-impedance power delivery.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck regulator applications.

Compared with MP2451DT-LF-Z and LM5116MH/NOPB, the FAN65004B uniquely combines 65 V input, 6 A output, dual-LDO biasing, and pre-bias startup in one PQFN package-reducing design time, component count, and failure points for high-voltage POL applications.

Availability

FAN65004B is available at Aetrix Electronics and suitable for telecom base station PSUs, industrial automation I/O modules, and USB-PD programmable power supplies requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for FAN65004B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, and IoT applications, with leadership in power management and high-voltage analog ICs.

The FAN65004B belongs to onsemi's high-performance synchronous buck regulator product line, designed specifically for high-input-voltage point-of-load conversion in space-constrained, thermally demanding environments like telecom infrastructure and industrial controls.

FAQ

What is the maximum input voltage rating for the FAN65004B?

The FAN65004B has an absolute maximum VIN rating of 70 V, but its recommended operating input voltage range is 4.5 V to 65 V DC. Operation above 65 V may compromise reliability or violate SOA limits, even if within absolute max ratings. The device uses onsemi's PowerTrench® MOSFETs rated for 65 V blocking, and the internal LDOs and gate drivers are optimized for this range. Always observe the 65 V upper limit in design.

How does the FAN65004B handle pre-biased output conditions during startup?

The FAN65004B supports pre-bias startup by forcing both high-side and low-side MOSFETs OFF until the SS pin voltage ramps up to match the existing FB voltage. This prevents reverse current flow into a powered load. Once matched, normal soft-start resumes. This behavior is confirmed in the Functional Description section and Figure 23–24 of the datasheet, and requires no external circuitry beyond standard SS capacitor selection.

Can the FAN65004B operate without an external compensation network on the COMP pin?

No - the FAN65004B requires an external RC compensation network connected to the COMP pin. Its error amplifier is intentionally un-compensated internally to allow loop optimization across varied output capacitors, inductors, and load conditions. Omitting the network results in instability, oscillation, or failure to regulate. Typical networks use a series RC from COMP to GND plus optional capacitor from COMP to FB, as shown in Figure 1 and Table 1.

What is the purpose of the HVBIAS and EXTBIAS pins on the FAN65004B?

HVBIAS powers the primary LDO (LDO1) and provides input voltage feed-forward for loop stability; it must be connected to VIN via an RC filter. EXTBIAS feeds the secondary LDO (LDO2) and enables automatic switchover when VO ≥ 5 V - reducing total bias power loss. Both pins determine LDO selection per Table 6: LDO2 activates only if EXTBIAS > 4.7 V and < HVBIAS, ensuring optimal efficiency across input/output combinations.

Does the FAN65004B support synchronization to an external clock signal?

Yes - the FAN65004B supports bidirectional frequency synchronization via the SYNC pin. In non-master mode, it locks to an external clock (70–130% of RT-set frequency); in master mode, it outputs a 50% duty-cycle clock synchronized to its internal oscillator. Synchronization delay is ≤64 cycles, enabling deterministic multi-rail EMI reduction in dense PCB layouts without requiring additional timing ICs.