Microchip Technology FDC37B727-NS

Overview

FDC37B727-NS from SMSC is a 128-pin QFP Super I/O controller integrating an 8042 keyboard controller, dual NS16C550A-compatible UARTs, a 2.88MB floppy disk controller (CMOS 765B core), Multi-Mode parallel port with ChiProtect™, and ACPI 1.0-compliant power management. It operates at 5 V, supports ISA Plug-and-Play, and delivers 20 GPIO pins, 32.768 kHz standby clock output, and SCI/SMI wake-event handling for legacy PC and embedded industrial control systems.

For engineers reviewing the FDC37B727-NS datasheet, FDC37B727-NS pinout, FDC37B727-NS application, or FDC37B727-NS equivalent, key selection considerations include ISA host interface compatibility, ACPI/PME/SMI register support, 128-pin QFP package footprint, 16-bit address qualification, and dual UART FIFO depth-critical for BIOS-integrated motherboard designs requiring backward-compatible I/O consolidation.

Technical Context

The FDC37B727-NS implements a unified ISA host interface with AEN, nIOR/nIOW, DRQ[0:3], nDACK[0:3], and 12 IRQ options-including SER_IRQ/IRQ15 and nPME/SCI/IRQ9-enabling direct integration into AT-class motherboards. Its internal architecture separates logical devices (FDC, UART1/2, parallel port, keyboard) via configuration registers, each independently relocatable across 480 I/O address options.

Power management is implemented through hardware-assisted SMI/SCI event routing, battery-backed wake-event latching (BUTTON_IN, nPOWERON), and Intelligent Auto Power Management with shadowed write-only registers. The floppy controller uses SMSC's proprietary 82077AA-compatible core with advanced digital data separator-no external filters required-and supports vertical recording format, 16-byte FIFO, and software write-protect.

Key Specifications

Pinout & Package

Package: 128-pin Quad Flat Package (QFP), 20 mm × 20 mm, 0.4 mm pitch, lead-free RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Super I/O controller applications.

Compared with Winbond W83977EF and ITE IT8712F, the FDC37B727-NS uniquely combines native 8042 keyboard controller with 2K ROM/256B RAM, 2.88 MB vertical-format floppy support, and ChiProtect™ parallel port-making it irreplaceable in designs requiring drop-in IBM AT BIOS compatibility and robust printer interface protection.

Availability

FDC37B727-NS is available at Aetrix Electronics and suitable for legacy PC motherboard refurbishment, industrial HMI panel production, and embedded BIOS reference platforms requiring stable component supply and long-term lifecycle support.

Supply support for FDC37B727-NS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

SMSC (Standard Microsystems Corporation) was a fabless semiconductor company specializing in connectivity, embedded control, and Super I/O solutions before its acquisition by Microchip Technology in 2012.

The FDC37B727-NS belongs to SMSC's FDC37B72x family of enhanced Super I/O controllers designed specifically for PC98/PC99-compliant desktop and embedded systems requiring consolidated legacy I/O with ACPI power management.

FAQ

What is the primary function of the FDC37B727-NS in a PC architecture?

The FDC37B727-NS serves as a fully integrated Super I/O controller consolidating keyboard/mouse, floppy disk, dual serial (UART), and parallel port functions onto a single 128-pin QFP die. It replaces multiple discrete chips in legacy AT-class motherboards and provides ISA Plug-and-Play and ACPI 1.0 compliance-making the FDC37B727-NS essential for BIOS-level I/O management and OS-directed power control in PC98/99-certified systems.

Does the FDC37B727-NS support 2.88 MB floppy drives, and what enables this capability?

Yes, the FDC37B727-NS supports 2.88 MB floppy drives via its licensed CMOS 765B floppy disk controller core and SMSC's proprietary 82077AA-compatible implementation. This includes vertical recording format support, advanced digital data separator (no external filters), 16-byte FIFO, and software write-protect-features confirmed in the functional description and register maps of the FDC37B727-NS datasheet.

How does the FDC37B727-NS handle ACPI wake events such as power button presses?

When the BUTTON_IN pin is asserted, the FDC37B727-NS latches the event and asserts nPME/SCI/IRQ9 to signal a wake request to the southbridge or chipset. The device supports both edge-triggered interrupts and a 4-second hold-to-power-off override feature. Battery-backed retention ensures wake-event persistence across AC loss-core behavior documented in the FDC37B727-NS ACPI/PME/SMI features section.

Can the FDC37B727-NS be used in 3.3 V systems, or is it strictly 5 V only?

The FDC37B727-NS is specified for 5 V ±5% operation only, with all I/O buffers (e.g., SD[0:7], SA[0:15], UARTs, parallel port) rated for 5 V TTL levels. Its 12 mA AT bus drivers and 24 mA floppy drivers require 5 V supply rails. Using the FDC37B727-NS in a 3.3 V system would violate absolute maximum ratings and is not supported-unlike later Super I/Os such as the IT8712F.

What distinguishes the ChiProtect™ circuitry in the FDC37B727-NS parallel port?

ChiProtect™ is SMSC's proprietary on-die protection scheme integrated into the FDC37B727-NS parallel port output drivers. It prevents latch-up and permanent damage when a powered-on printer is connected to a live parallel port-a known failure mode in industrial environments. Unlike external TVS diodes, ChiProtect™ operates transparently without altering timing or requiring layout changes, and is explicitly cited in the FDC37B727-NS features list and functional description.