My Inquiry
My Account
Microchip Technology FDC37C669-MT
- Part No.:
- FDC37C669-MT
- Manufacturer:
- Microchip Technology
- Category:
- Specialized
- Package:
- 100-LQFP
- Datasheet:
-
FDC37C669-MT.pdf
- Description:
- IC INTERFACE SPECIALIZED 100TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:2,056
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
FDC37C669-MT from SMSC is a PC 98/99-compliant Super I/O IC integrating a licensed CMOS 765B floppy disk controller, two NS16C550-compatible UARTs with 16-byte FIFOs, an EPP/ECP parallel port with ChiProtect, IDE interface support, and infrared (IrDA/HPSIR/ASKIR) capability - all in a 100-pin TQFP RoHS-compliant package. It delivers 2 Mbps floppy data rate, vertical recording support, and intelligent auto power management for legacy motherboard designs.
For engineers reviewing the FDC37C669-MT datasheet, FDC37C669-MT pinout, FDC37C669-MT application, or FDC37C669-MT equivalent, this page provides verified pin functions, PC/AT/PS/2 register compatibility, IRQ/DMA configuration options, and real-world use cases in industrial embedded control, legacy server maintenance, and retro-computing platform integration.
Technical Context
The FDC37C669-MT implements a true CMOS 765B floppy controller core with 16-byte FIFO, programmable data rates (250–2000 kbps), and vertical recording mode at 1 Mbps. Its dual UARTs support IrDA 1.0 HPSIR and ASKIR protocols via dedicated RX/TX pins (RXD2/IRRX, TXD2/IRTX), with baud rates up to 460 kbps and full modem handshaking (nRTS/nCTS/nDTR/nDSR/nDCD/nRI).
The multi-mode parallel port supports Standard, EPP 1.7/1.9 (IEEE 1284), and ECP modes, incorporating ChiProtect circuitry to prevent damage from hot-plugged printers. The ISA host interface uses A0–A10 address lines, nIOR/nIOW strobes, and three independent DRQ/nDACK channels with TC input for DMA coordination.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Floppy Controller Core | Licensed CMOS 765B, 100% IBM PC/XT/AT register- and software-compatible |
| Floppy Data Rates | 250, 300, 500, 1000, 2000 kbps - enables vertical recording and high-density 2.88 MB floppy support |
| UARTs | Two NS16C550-compatible with 16-byte send/receive FIFOs and IrDA 1.0 HPSIR/ASKIR support |
| Parallel Port Modes | Standard, EPP 1.7/1.9, ECP (IEEE 1284 compliant) with ChiProtect for printer hot-swap safety |
| IDE Interface | On-chip decode logic compatible with IBM PC/XT and PC/AT embedded hard disk drives |
| Power Management | Sophisticated Power Control Circuitry (PCC) with multiple low-power down modes |
| Package | 100-pin TQFP, lead-free, RoHS-compliant - matches footprint of FDC37C669TQFP and FDC37C669-MS |
Pinout & Package
Package: 100-pin Thin Quad Flat Package (TQFP), RoHS-compliant, lead-free, 0.5 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0–D7 | Host Data Bus | 8-bit bidirectional I/O bus (24 mA sink) for CPU communication; high-impedance when inactive |
| nIOR / nIOW | ISA Read/Write Strobe | Active-low signals qualifying host read/write cycles; used with A0–A10 for register access |
| A0–A10 | Address Bus | 11-bit address inputs latched on nIOR/nIOW edge; enable full I/O space decoding for FDC, UART, parallel, IDE blocks |
| DRQ_A / DRQ_B / DRQ_C | DMA Request Outputs | Three independent active-high DMA requests for floppy, serial, and parallel/IDE transfers |
| nDACK_A / nDACK_B / nDACK_C | DMA Acknowledge Inputs | Active-low handshake signals enabling byte-level DMA transfers per channel |
| IRQ_A, IRQ_C–F, IRQ_H, IRQ_B | Interrupt Outputs | Eight configurable IRQ outputs (OD24/OD24P) supporting shared interrupt arbitration in EPP/ECP mode |
| RXD2/IRRX / TXD2/IRTX | Infrared Serial Interface | Dedicated IR receive/transmit pins supporting IrDA 1.0 HPSIR and ASKIR physical layer protocols |
| nSTROBE / nAUTOFD / BUSY / nACK | Parallel Port Control/Status | EPP/ECP timing-critical signals with OD24 drivers; BUSY/nACK are Schmitt-triggered inputs for robust printer handshake |
Key Features
| Feature | Design Value |
|---|---|
| ChiProtect Parallel Port | Hardware circuitry prevents latch-up or damage when printer is powered before system boot - eliminates need for external isolation |
| Software Configurable Logic (SCL) | Allows runtime reconfiguration of FDC, UART, and parallel port modes without hardware changes or jumper settings |
| Vertical Recording Support | Enables reliable 2.88 MB floppy operation at 1 Mbps with built-in precompensation and digital data separator tuning |
| Integrated IDE Decode | On-chip logic eliminates external gate array for PC/XT and PC/AT IDE interface - reduces BOM count and board area |
| Intelligent Auto Power Management | PCC circuitry automatically enters low-power states during idle periods - cuts standby current to ISTBY level while preserving register state |
Applications
| Industrial Legacy Control Systems | Retro-Computing Motherboard Refurbishment |
|---|---|
Use Scenario: Maintaining production-line PLC controllers based on ISA-bus industrial PCs requiring floppy-based firmware updates and serial diagnostics. IC Role / Device Role / Timing Role: Central Super I/O hub managing floppy boot media, dual RS-232 debug ports (one with IrDA for wireless terminal pairing), and EPP-connected legacy HMI panels. Use Value: Eliminates need for discrete UART, FDC, and parallel port ICs - single-chip integration reduces failure points and simplifies CE/UL re-certification for aging platforms. |
Use Scenario: Restoring vintage IBM PS/2 Model 80 and Compaq Deskpro systems where original Super I/O chips are obsolete or damaged. IC Role / Device Role / Timing Role: Drop-in replacement for SMSC FDC37C669TQFP with identical pinout, register map, and timing - supports 2.88 MB floppies and PS/2 keyboard/mouse interfaces. Use Value: RoHS-compliant lead-free packaging meets modern repair shop environmental requirements without sacrificing 100% IBM compatibility or vertical recording functionality. |
| Embedded Server BMC Interfaces | Medical Device Service Port Integration |
Use Scenario: Enabling out-of-band serviceability in rack-mounted servers using legacy BMC designs that rely on ISA-based floppy and serial console access. IC Role / Device Role / Timing Role: Provides isolated floppy controller for BIOS recovery images, dual UARTs (one for IPMI console, one for IrDA service technician link), and ECP parallel port for diagnostic printer output. Use Value: Integrated PCC ensures minimal power draw during BMC sleep states - critical for always-on service processors with strict thermal budgets. |
Use Scenario: Adding field-service capabilities to FDA-cleared medical imaging equipment requiring secure, isolated service ports compliant with IEC 60601-1. IC Role / Device Role / Timing Role: Delivers galvanically isolated serial diagnostics (via optocoupled UART lines), protected parallel port for service reports, and floppy-based calibration data loading - all under single-chip control. Use Value: ChiProtect and Schmitt-triggered inputs (nWRTPRT, nTRK0, nINDEX) ensure noise immunity in electrically noisy clinical environments - no false disk-change or track-zero errors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Super I/O applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| FDC37C669TQFP | Same die, non-RoHS 100-pin TQFP package with leaded solder finish | Restricted for new designs under RoHS; requires Pb-containing assembly process | Select only for legacy repair where lead-free rework is prohibited by existing board finish |
| FDC37C669-MS | Same die, RoHS-compliant 100-pin QFP package (not TQFP); 0.65 mm pitch vs. 0.5 mm | Requires PCB footprint redesign; incompatible with FDC37C669-MT land pattern | Choose only if QFP layout already exists and TQFP rework is impractical |
Compared with FDC37C669TQFP and FDC37C669-MS, the FDC37C669-MT offers identical electrical and functional behavior with RoHS compliance in the exact 100-pin TQFP footprint required for drop-in replacement in certified industrial and medical motherboards - avoiding both leaded-process restrictions and mechanical redesign.
Availability
FDC37C669-MT is available at Aetrix Electronics and suitable for industrial legacy control systems, retro-computing motherboard refurbishment, and embedded server BMC interfaces requiring stable component supply across extended product lifecycles.
Supply support for FDC37C669-MT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
SMSC (Standard Microsystems Corporation) was a fabless semiconductor company specializing in connectivity, embedded control, and Super I/O solutions before its acquisition by Microchip Technology in 2012.
The FDC37C669-MT belongs to SMSC's PC 95/98/99-compliant Super I/O family, designed specifically for cost-sensitive, space-constrained motherboard applications requiring integrated floppy, serial, parallel, and IDE functionality with full IBM compatibility.
FAQ
What is the primary function of the FDC37C669-MT in a PC architecture?
The FDC37C669-MT serves as a fully integrated Super I/O controller, consolidating floppy disk control (CMOS 765B core), dual UARTs, multi-mode parallel port (EPP/ECP), IDE interface, and infrared support into a single 100-pin TQFP device. It replaces up to seven discrete components on legacy PC motherboards while maintaining 100% IBM PC/XT/AT register and software compatibility - making it essential for boot media handling, serial diagnostics, and parallel peripheral interfacing in industrial and retro-computing systems. The FDC37C669-MT is engineered for direct integration into ISA-bus platforms with no external glue logic required.
Does the FDC37C669-MT support modern operating systems like Windows 10 or Linux?
The FDC37C669-MT itself does not require OS-specific drivers - its functionality is accessed through standard PC I/O port addresses (e.g., 3F0h for floppy, 3F8h for COM1) and ISA-level interrupts (IRQ6, IRQ4). Windows 10 and modern Linux kernels retain native support for these legacy interfaces via built-in floppy, serial, and parallel port drivers. However, driver availability depends on the host chipset's LPC bridge and BIOS configuration; the FDC37C669-MT must be enabled in configuration mode (via index/data registers 3F0h/3F1h) and assigned valid base addresses and IRQs before the OS can enumerate its resources. The FDC37C669-MT operates transparently once properly configured in the system firmware.
How does the ChiProtect circuitry in the FDC37C669-MT protect against printer-related damage?
ChiProtect is a patented hardware feature in the FDC37C669-MT's parallel port that prevents latch-up or overvoltage damage when a printer is powered on while the host system is off or in reset. It achieves this by internally isolating the PD0–PD7 data lines and control outputs (nSTROBE, nAUTOFD, etc.) from VCC until PWRGD asserts a valid power-good signal. This ensures no current flows from the printer's +5V rail into the unpowered FDC37C669-MT silicon. Unlike software-based protections or external diodes, ChiProtect operates at the transistor level and requires zero configuration - a key reliability advantage in field-deployed industrial equipment where technicians may connect peripherals before powering up the main system. The FDC37C669-MT maintains this protection across all parallel port modes (Standard, EPP, ECP).
Can the FDC37C669-MT's infrared interface interoperate with standard IrDA devices?
Yes - the FDC37C669-MT's second UART (UART2) includes dedicated pins RXD2/IRRX and TXD2/IRTX that implement physical-layer IrDA 1.0 compliance for both HPSIR (High-Power Serial Infrared) and ASKIR (Amplitude Shift Keyed Infrared) protocols. It supports standard IrDA SIR (Serial Infrared) data rates up to 115.2 kbps and is interoperable with common IrDA transceivers (e.g., Vishay TFBS4650, Sharp GP2S10) and host devices including older laptops, PDAs, and diagnostic tools. The FDC37C669-MT does not include FIR (Fast IR) or MIR (Medium IR) support; its infrared capability is strictly SIR-class, matching the requirements of legacy service and configuration workflows. Configuration is handled via standard 16C550 register writes - no proprietary firmware is needed to enable IrDA mode on the FDC37C669-MT.
What are the key differences between FDC37C669-MT and FDC37C669-MS?
The FDC37C669-MT and FDC37C669-MS share identical silicon die, register set, and electrical specifications - but differ exclusively in package type and pitch. The FDC37C669-MT uses a 100-pin TQFP with 0.5 mm lead pitch and RoHS-compliant lead-free terminations, while the FDC37C669-MS uses a 100-pin QFP with 0.65 mm pitch and also complies with RoHS. These packages are mechanically incompatible: the land patterns, stencil apertures, and reflow profiles differ significantly. Therefore, the FDC37C669-MT cannot be substituted for the FDC37C669-MS without PCB revision. Both parts offer identical functionality, but the FDC37C669-MT is optimized for space-constrained designs where finer-pitch TQFP is preferred. Neither part is pin-compatible with the leaded FDC37C669TQFP due to solder finish differences affecting wetting behavior.
FDC37C669-MT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 100-LQFP
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- -
- Interface:
- ISA Host
- Voltage - Supply:
- 4.5V ~ 5.5V
- Supplier Device Package:
- 100-TQFP (14x14)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
FDC37C669-MT FAQ
1.How can I place an order for FDC37C669-MT through Aetrix?
Please submit a Request for Quotation (RFQ) for FDC37C669-MT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for FDC37C669-MT reliable?
The price and inventory of FDC37C669-MT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for FDC37C669-MT is usually 5 days.
3.What payment methods are accepted for FDC37C669-MT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for FDC37C669-MT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for FDC37C669-MT?
FDC37C669-MT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your FDC37C669-MT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for FDC37C669-MT?
For technical support, including FDC37C669-MT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your FDC37C669-MT requirements.
6.How does Aetrix verify that FDC37C669-MT is sourced from the original manufacturer or authorized distributors?
All FDC37C669-MT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that FDC37C669-MT meets industry standards.
7.What is the process for return or replacement of FDC37C669-MT?
All FDC37C669-MT units undergo pre-shipment inspection (PSI). If there is an issue with FDC37C669-MT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The FDC37C669-MT part is unused and in its original packaging.
Return procedure for FDC37C669-MT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
FDC37C669-MT Tags
-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments
-
MD0100N8-G
Microchip Technology
-
PCA9548APW,118
NXP Semiconductors
-
PCA9540BDP,118
NXP Semiconductors
-
PCA9548APWR
Texas Instruments
-
PCA9546APW,118
NXP Semiconductors
-
PTN3360DBS,518
NXP Semiconductors
-
PCA9546ABS,118
NXP Semiconductors
-
PCA9518PWR
Texas Instruments
-
PCA9545APW,118
NXP Semiconductors
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
