NXP Semiconductors FS32K146HFT0MLQT
- Part No.:
- FS32K146HFT0MLQT
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
FS32K146HFT0MLQT.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
FS32K146HFT0MLQT from NXP Semiconductors is an automotive-grade 32-bit Arm Cortex-M4F microcontroller with 2 MB flash, 256 KB SRAM (both with ECC), 112 MHz HSRUN/80 MHz RUN operation, and integrated CSEc security engine. It supports CAN-FD, FlexCAN, LPUART/LIN, LPSPI, LPI2C, FlexIO, and 12-bit ADCs - deployed in vehicle body control modules requiring ASIL-B functional safety compliance.
For engineers reviewing the FS32K146HFT0MLQT datasheet, FS32K146HFT0MLQT pinout, FS32K146HFT0MLQT application, or FS32K146HFT0MLQT equivalent, key selection criteria include its -40 °C to +125 °C ambient rating (M-grade), 100-pin LQFP package, dual-core debug support via SWD/JTAG, and mandatory mode-switching (RUN at 80 MHz) for CSEc or EEPROM operations.
Technical Context
The FS32K146HFT0MLQT implements a single Arm Cortex-M4F core with FPU and DSP extensions, operating at up to 112 MHz in HSRUN mode (with 1.25 DMIPS/MHz) and 80 MHz in RUN mode. Its memory subsystem includes 2 MB program flash with ECC, 64 KB FlexNVM for data flash/EEPROM emulation, and 256 KB SRAM with ECC - all protected by NXP's system MPU at the crossbar switch level.
Peripherals are managed through AXBS-Lite crossbar, eDMA with DMAMUX (63 request sources), and TRGMUX for flexible peripheral triggering. Safety features include CRC module, WDOG/EWM watchdogs, System MPU, and CSEc cryptographic engine compliant with SHE specification - with explicit runtime constraints: CSEc execution and EEPROM writes require switching from HSRUN to RUN mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Voltage Range | 2.7 V to 5.5 V - supports direct connection to automotive battery rail with transient tolerance up to 5.8 V for ≤60 s. |
| Operating Temperature | -40 °C to +125 °C (ambient) - qualified for under-hood body control unit placement per M-grade specification. |
| CPU Core | Arm Cortex-M4F with FPU and DSP - enables real-time motor control and sensor fusion without external math acceleration. |
| Max Clock Frequency | 112 MHz (HSRUN mode), 80 MHz (RUN mode) - HSRUN disabled for CSEc/EEPROM access; RUN mode required for secure boot or data logging. |
| Memory | 2 MB flash (ECC), 256 KB SRAM (ECC), 64 KB FlexNVM - ECC ensures bit-error resilience in safety-critical firmware and runtime data storage. |
| Communication | 3× FlexCAN (CAN-FD capable), 3× LPUART/LIN, 3× LPSPI, 2× LPI2C - full protocol stack support for gateway and domain controller topologies. |
| Security | Cryptographic Services Engine (CSEc) - hardware-accelerated AES-128/256, SHA-256, RNG, and key management per SHE spec; requires RUN mode execution. |
| Package | 100-pin LQFP (14 × 14 mm, 0.5 mm pitch) - pin-compatible with other S32K14x devices in same package footprint. |
Pinout & Package
FS32K146HFT0MLQT is housed in a 100-pin LQFP package (14 × 14 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions align with S32K14x family I/O multiplexing; specific signal assignments depend on configuration via SIM_SOPT registers and pin control registers (PCR).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VREFH, VREFL | Power and reference supply inputs | Separate analog/digital rails with ≤0.1 V differential tolerance; VREFH must not exceed VDDA + 0.1 V to maintain ADC accuracy. |
| RESET_B | Active-low reset input | Asynchronous reset assertion forces device into reset state; internal pull-up ensures safe startup if left unconnected. |
| SWD_CLK, SWD_DIO | Serial Wire Debug interface | Two-pin debug port supporting full JTAG/SWD functionality including trace (ITM/TPIU) and flash patch/breakpoint (FPB). |
| CAN0_TX, CAN0_RX | FlexCAN0 differential transceiver signals | Direct connection to external CAN transceiver; supports ISO 11898-1 physical layer and CAN-FD data rates up to 5 Mbps. |
| ADC0_SE0–ADC0_SE31 | Analog input channels (ADC0) | Up to 32 single-ended inputs per 12-bit SAR ADC module; 1 Msps sampling rate enables high-fidelity sensor acquisition. |
| FLEXIO0_IO00–FLEXIO0_IO15 | FlexIO configurable I/O pins | 16-pin bank supporting UART/I²C/SPI/PWM emulation; programmable timing and trigger sources enable custom protocol offload. |
Key Features
| Feature | Design Value |
|---|---|
| ASIL-B Ready Architecture | System MPU enforces memory region access rights across all masters (CPU, DMA, Ethernet); ECC on flash/SRAM detects/corrects single-bit errors. |
| Multi-Mode Power Management | Five power modes (HSRUN/RUN/STOP/VLPR/VLPS) with clock gating and peripheral isolation - enables <1 µA stop-current for battery-backed wake-up applications. |
| Flexible Timing Subsystem | Eight 16-bit FlexTimers (64 total channels), LPIT (4-channel), LPTMR, PDB, and RTC - supports complex PWM generation, capture, and time-synchronized event triggering. |
| Secure Boot & Runtime Protection | CSEc implements authenticated boot, encrypted firmware update, and runtime key derivation - all requiring explicit RUN-mode execution (80 MHz) per safety constraint. |
| QuadSPI with HyperBus™ | External memory interface supporting x4 DDR reads at up to 133 MHz - enables fast code execution from external flash or RAM expansion beyond on-chip limits. |
| Human-Machine Interface Support | 156 GPIOs with interrupt capability, NMI input, and configurable slew rate/pull-up/down - suitable for direct switch matrix scanning and LED driver control. |
Applications
| Body Control Module (BCM) | Electric Power Steering (EPS) Sensor Interface |
|---|---|
|
Use Scenario: Centralized control of lighting, door locks, window lifts, and HVAC actuators in modern vehicle architectures. IC Role / Device Role / Timing Role: Main application MCU executing AUTOSAR BSW and application software; FlexTimers generate precise PWM for motor drivers; CAN-FD handles high-bandwidth actuator feedback. Use Value: 2 MB flash accommodates multi-layer AUTOSAR stack and OTA update partition; CSEc enables secure firmware signing and rollback protection. |
Use Scenario: Acquisition and preprocessing of torque, angle, and temperature sensor data for EPS ECU closed-loop control. IC Role / Device Role / Timing Role: Real-time sensor hub interfacing with resolver, Hall-effect, and thermistor sensors via 12-bit ADCs and CMP+DAC; LPIT triggers deterministic sampling intervals. Use Value: 1 Msps ADC sampling and DSP-enabled filtering reduce host CPU load; ECC memory ensures integrity of safety-critical position calculations. |
| Gateway Controller | Advanced Driver Assistance Systems (ADAS) Camera Interface |
|
Use Scenario: Protocol translation and message routing between CAN-FD, LIN, and Ethernet domains in zonal architecture. IC Role / Device Role / Timing Role: Network bridge with concurrent FlexCAN, LPI2C, and 10/100 Mbps Ethernet MAC; TRGMUX synchronizes timestamped CAN messages with Ethernet frames. Use Value: IEEE 1588 timestamping enables sub-microsecond clock synchronization across domains; FlexIO emulates proprietary sensor interfaces. |
Use Scenario: Preprocessing raw image sensor data (e.g., MIPI CSI-2 via parallel interface emulation) before forwarding to vision SoC. IC Role / Device Role / Timing Role: High-speed parallel I/O configured via FlexIO to capture pixel streams; DMA transfers to SRAM; CRC validates frame integrity pre-transfer. Use Value: 256 KB ECC SRAM buffers multiple frames; QuadSPI interface loads calibration tables from external flash; low-latency interrupt response ensures no frame loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| FS32K148HFT0MLQT | 2 MB flash, 256 KB SRAM, 100-pin LQFP, adds Ethernet MAC + 2× SAI - identical core/peripheral set except enhanced comms. | Required when IEEE 1588 time-synchronized Ethernet backbone or audio streaming is needed alongside CAN-FD. | Select FS32K148HFT0MLQT only if Ethernet or SAI functionality is mandatory; otherwise FS32K146HFT0MLQT offers optimal cost/performance balance. |
| FS32K144HFT0MLQT | 1 MB flash, 192 KB SRAM, 100-pin LQFP, same peripherals but reduced memory capacity and no FlexNVM EEPROM emulation. | Suitable for simpler body control nodes where OTA update partitioning or persistent parameter storage is not required. | Choose FS32K144HFT0MLQT for cost-sensitive designs with <1 MB firmware footprint and no EEPROM emulation need. |
Compared with FS32K148HFT0MLQT, FS32K146HFT0MLQT removes Ethernet/SAI but retains full CAN-FD and security capability; versus FS32K144HFT0MLQT, it adds 1 MB flash and FlexNVM - enabling robust OTA updates and secure key storage in constrained space.
Availability
FS32K146HFT0MLQT is available at Aetrix Electronics and suitable for automotive body control modules, electric power steering sensor interfaces, gateway controllers, and ADAS camera preprocessing units requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for FS32K146HFT0MLQT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in functional safety and automotive-grade reliability.
The S32K1xx product line delivers scalable, ASIL-B-certified Arm Cortex-M microcontrollers designed specifically for automotive body electronics, chassis, and ADAS domain controllers - emphasizing safety, security, and real-time performance.
FAQ
What is the maximum operating frequency of the FS32K146HFT0MLQT and under what conditions?
The FS32K146HFT0MLQT operates at up to 112 MHz in HSRUN mode and 80 MHz in RUN mode. HSRUN mode is restricted from executing CSEc security operations or FlexNVM EEPROM writes - those functions require explicit transition to RUN mode at 80 MHz. The 112 MHz rating applies only to application code and non-security peripherals.
Does the FS32K146HFT0MLQT support CAN-FD, and how many instances are available?
Yes, the FS32K146HFT0MLQT integrates three FlexCAN modules, each supporting CAN-FD per ISO 11898-1. All three instances are fully functional in the 100-pin LQFP package, with dedicated TX/RX pins mapped to separate pin groups to avoid routing conflicts in multi-bus architectures.
What memory protection mechanisms are implemented in the FS32K146HFT0MLQT?
The FS32K146HFT0MLQT uses NXP's system MPU - a crossbar-level memory protection unit that assigns access rights (read/write/execute) per master (CPU, DMA, Ethernet) to each memory region. This differs from Arm's core MPU and provides broader enforcement across all bus masters, meeting ASIL-B requirements for memory isolation.
Is the FS32K146HFT0MLQT pin-compatible with other S32K14x devices in the same package?
Yes, all S32K14x devices sharing the 100-pin LQFP package - including FS32K142HFT0MLQT, FS32K144HFT0MLQT, FS32K146HFT0MLQT, and FS32K148HFT0MLQT - are pin-to-pin compatible. Peripheral enablement depends on firmware configuration, not pin assignment, enabling hardware reuse across variants.
What is the purpose of the FlexNVM block in the FS32K146HFT0MLQT?
The 64 KB FlexNVM block in the FS32K146HFT0MLQT serves dual roles: as data flash memory with ECC for storing calibrated parameters or logs, and as EEPROM emulation memory. It requires explicit RUN-mode operation (80 MHz) for write/erase cycles - a safety constraint enforced by hardware to prevent simultaneous high-speed execution and non-volatile memory modification.
FS32K146HFT0MLQT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 144-LQFP
- Series:
- S32K
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4F
- Core Size:
- 32-Bit Single-Core
- Speed:
- 80MHz
- Connectivity:
- CANbus, FlexIO, I2C, LINbus, SPI, UART/USART
- Peripherals:
- POR, PWM, WDT
- Number of I/O:
- 128
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 24x12b SAR; D/A1x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
FS32K146HFT0MLQT FAQ
1.How can I place an order for FS32K146HFT0MLQT through Aetrix?
Please submit a Request for Quotation (RFQ) for FS32K146HFT0MLQT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for FS32K146HFT0MLQT reliable?
The price and inventory of FS32K146HFT0MLQT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for FS32K146HFT0MLQT is usually 5 days.
3.What payment methods are accepted for FS32K146HFT0MLQT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for FS32K146HFT0MLQT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for FS32K146HFT0MLQT?
FS32K146HFT0MLQT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your FS32K146HFT0MLQT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for FS32K146HFT0MLQT?
For technical support, including FS32K146HFT0MLQT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your FS32K146HFT0MLQT requirements.
6.How does Aetrix verify that FS32K146HFT0MLQT is sourced from the original manufacturer or authorized distributors?
All FS32K146HFT0MLQT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that FS32K146HFT0MLQT meets industry standards.
7.What is the process for return or replacement of FS32K146HFT0MLQT?
All FS32K146HFT0MLQT units undergo pre-shipment inspection (PSI). If there is an issue with FS32K146HFT0MLQT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The FS32K146HFT0MLQT part is unused and in its original packaging.
Return procedure for FS32K146HFT0MLQT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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