onsemi FUSB301ATMX
- Part No.:
- FUSB301ATMX
- Manufacturer:
- onsemi
- Category:
- Controllers
- Package:
- 12-XFQFN
- Datasheet:
-
FUSB301ATMX.pdf
- Description:
- IC USB TYPE C CTLR PROGR 12TMLP
- Quantity:
- Payment:

- Shipping:

Inventory:1,345
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Product details
Overview
FUSB301ATMX from onsemi is a fully autonomous USB Type-C controller optimized for sub-15 W applications, supporting Source, Sink, and DRP modes with dead battery operation, configurable I²C address (0x44 or 0x45), and CC line detection compliant with USB Type-C 1.1/1.0 specifications - deployed in smartphones and ultra-portable devices.
For engineers reviewing the FUSB301ATMX datasheet, pinout, applications, or equivalent options, key selection criteria include its 12-pin X2QFN package, 3.0–5.5 V supply range, 2.0 µA disable current, 7.0 µA standby current, and support for Try.SNK/Try.SRC negotiation sequences.
Technical Context
The FUSB301ATMX implements dedicated hardware-based CC logic detection without host CPU intervention, enabling autonomous attach/detach, orientation detection (CC1/CC2), and VBUS presence monitoring via internal comparators. It supports dual-role port (DRP) toggling with programmable timing (20–70 ms per state) and accessory detection (Audio/Debug) with 50–200 ms debounce.
Its I²C interface operates in Fast Mode (up to 400 kHz), uses open-drain SDA/SCL with Schmitt-trigger inputs, and features an active-low interrupt (INT_N) that signals register-accessible events including ATTACH, DETACH, BC_LVL change, and accessory transitions - all managed through eight user-accessible control/status registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 3.0 V to 5.5 V - powers device across standard USB bus and system rail voltages without external regulation |
| Disable Current | ≤ 2.0 µA - enables ultra-low-power suspend states in battery-powered portable systems |
| Standby Current | ≤ 7.0 µA - maintains CC monitoring while unattached, critical for always-on USB-C detection |
| I²C Address | 0x44 or 0x45 - set by I2CADDR pin; allows dual-port systems to share one I²C bus without address conflict |
| CC Detection Thresholds | Rd = 0.61–0.70 V (Sink default), Ra = 0.15–0.25 V - ensures reliable USB-C spec-compliant voltage-level identification |
| VBUS Threshold | 3.7 V - triggers VBUSOK status only when valid USB power is present, preventing false wake-up |
| ESD Protection | 2 kV HBM on CC/VBUS pins - meets IEC 61000-4-2 system-level ESD robustness for consumer end equipment |
Pinout & Package
Package: X2QFN-12 (1.6 mm × 1.6 mm × 0.375 mm), ultra-thin molded leadless, moisture sensitivity level 1 (MSL1), RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CC1, CC2 | Config Channel I/O | Dual bidirectional analog sense lines for USB-C cable orientation, source/sink role, and current capability detection |
| VBUS | Input | Direct connection to USB-C VBUS line for presence detection and overvoltage protection input reference |
| VDD | Power | Main supply input (3.0–5.5 V); powers internal logic, CC comparators, and pull-up/down resistors |
| GND | Ground | System reference return path for all analog and digital circuitry; must be low-impedance for noise immunity |
| SCL, SDA | I²C Interface | Fast Mode (400 kHz) open-drain bus signals; require external pull-ups to VDD for host communication |
| INT_N | Interrupt Output | Active-low open-drain signal indicating pending status/interrupt events requiring host register read |
| ID | Role Indicator | Open-drain output signaling detected role (Sink = LOW, Hi-Z = no sink) for processor-side USB 2.0 handshake |
| I2CADDR | Address Select | Logic input setting bit-3 of I²C slave address (0x44 or 0x45) to enable multi-port coexistence |
| NC1, NC2 | No Connect | Unbonded die pads; must be tied to GND or left floating per layout guidelines to avoid parasitic coupling |
Key Features
| Feature | Design Value |
|---|---|
| Autonomous Type-C State Machine | Hardware-implemented CC logic eliminates firmware dependency for basic attach/detach/orientation functions |
| Dead Battery Support | Enables sink-mode operation with zero VDD applied - pulls down CC line to signal source and initiate VBUS delivery |
| DRP Toggle Timing Control | Four programmable DRP toggle intervals (20–70 ms) allow optimization for thermal, power, or latency constraints |
| Configurable Pull-Up Current | Three source current options (80 µA / 180 µA / 330 µA) match USB PD default, 1.5 A, and 3 A sink requirements |
| Accessory Detection Logic | Distinguishes Audio Accessory (Ra = ~5.1 kΩ) and Debug Accessory (Ra = ~1 kΩ) using dedicated threshold comparators |
Applications
| Smartphones | Tablets |
|---|---|
Use Scenario: USB-C port management in compact mobile handsets with single-chip PMIC integration. IC Role / Device Role / Timing Role: Autonomous Type-C controller handling CC negotiation, orientation detection, and VBUS monitoring independent of AP boot state. Use Value: Enables fast, reliable plug-and-play USB-C connectivity with zero firmware overhead and <2.0 µA disable current for battery longevity. | Use Scenario: Dual-role USB-C port implementation in mid-size tablets supporting charging, data, and audio accessory modes. IC Role / Device Role / Timing Role: DRP controller managing Try.SNK/Try.SRC toggling, accessory detection, and dead-battery sink activation during cold boot. Use Value: Reduces BOM count by eliminating discrete CC switches and simplifies layout with integrated 5.1 kΩ Rd pull-down and 10 kΩ Ra termination. |
| Notebooks | Ultra Portable Applications |
Use Scenario: Slim-profile laptop USB-C ports requiring minimal PCB area and thermal footprint. IC Role / Device Role / Timing Role: Low-power Type-C controller providing VBUSOK signaling, orientation-aware DP Alt Mode readiness, and I²C-configurable DRP behavior. Use Value: Achieves 1.6 mm × 1.6 mm footprint and 0.375 mm height - compatible with fanless, sub-12 mm chassis designs. | Use Scenario: Wearables and compact IoT devices needing USB-C for firmware updates and battery charging. IC Role / Device Role / Timing Role: Standalone CC manager enabling USB-C compliance without full USB protocol stack or host CPU involvement. Use Value: Delivers certified USB-C functionality at 7.0 µA standby current - extends battery life beyond 30 days in always-connected mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB Type-C controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TUSB320LAIRTER | Supports USB PD 3.0 messaging via integrated PHY; requires external MCU for policy engine; higher active current (12 µA standby) | Required where USB Power Delivery communication (e.g., voltage negotiation) is needed beyond basic Type-C detection | Select TUSB320LAIRTER only if PD messaging capability is mandatory; FUSB301ATMX suffices for non-PD, sub-15 W use cases |
| IP5306 | Integrated Li-ion charger + USB switch + Type-C controller in single package; fixed I²C address; no DRP toggle configuration | Targeted at cost-sensitive power banks and portable chargers where charging and port control are co-located | Choose IP5306 for monolithic power bank solutions; FUSB301ATMX offers superior flexibility and lower quiescent current for host-system integration |
Compared with TUSB320LAIRTER and IP5306, the FUSB301ATMX delivers the lowest power autonomy for basic USB-C detection - ideal for host-controlled systems needing minimal firmware interaction, precise DRP timing, and guaranteed dead-battery operation without added complexity or current penalty.
Availability
FUSB301ATMX is available at Aetrix Electronics and suitable for smartphones, tablets, and ultra-portable applications requiring stable component supply, long-term lifecycle support, and consistent traceable sourcing.
Supply support for FUSB301ATMX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The FUSB301ATMX belongs to onsemi's USB Type-C interface product line, designed specifically to simplify USB-C port implementation in space-constrained, battery-sensitive portable electronics without sacrificing specification compliance or power efficiency.
FAQ
What is the primary function of the FUSB301ATMX in a USB-C system?
The FUSB301ATMX serves as a fully autonomous USB Type-C controller responsible for CC line detection, orientation identification, source/sink/DRP role negotiation, VBUS monitoring, and accessory detection - all implemented in hardware without requiring continuous host CPU supervision. Its design enables reliable, low-power USB-C connectivity in smartphones, tablets, and ultra-portable devices where firmware resources are constrained. The FUSB301ATMX handles the entire USB-C physical layer state machine independently.
Does the FUSB301ATMX support USB Power Delivery (PD) communication?
No, the FUSB301ATMX does not support USB Power Delivery (PD) communication. It implements only the USB Type-C specification's physical layer (CC detection, orientation, role determination, dead battery support, and accessory identification) and lacks a PD PHY or BMC decoder. For PD messaging, a separate PD controller (e.g., FUSB302B or TUSB320) is required. The FUSB301ATMX remains fully functional for non-PD, sub-15 W applications such as basic charging and data-only USB-C ports.
How does the FUSB301ATMX achieve dead battery operation?
The FUSB301ATMX achieves dead battery operation by enabling sink-mode functionality even when VDD = 0 V. When attached to a powered USB-C source, the source's CC pull-up resistor biases the CC line, and the FUSB301ATMX internally activates its Rd pull-down (≈5.1 kΩ) to bring the CC voltage into the source's detectable range - triggering VBUS turn-on. This behavior is hardware-defined and requires no external components or host intervention. The FUSB301ATMX resumes full operation once VDD rises above 2.8 V.
What are the I²C address options for the FUSB301ATMX and how are they selected?
The FUSB301ATMX supports two I²C slave addresses: 0x44 and 0x45. The address is selected by the logic level on the I2CADDR pin - LOW selects 0x44, HIGH selects 0x45. This configurability allows two FUSB301ATMX devices to share the same I²C bus in multi-port systems (e.g., dual USB-C laptop ports) without address collision. The FUSB301ATMX does not support additional addresses; only these two options are defined in the datasheet and verified in register map Table 2.
Can the FUSB301ATMX be used in DRP mode with accessory detection enabled?
Yes, the FUSB301ATMX supports DRP mode with accessory detection enabled via the DRP+ACC bit (bit 7) in the Modes register (address 0x02). When configured this way, the device autonomously toggles between Unattached.Sink and Unattached.Source states while simultaneously monitoring for Audio Accessory (Ra ≈ 5.1 kΩ) and Debug Accessory (Ra ≈ 1.0 kΩ) signatures on the CC line. The FUSB301ATMX asserts the I_ACC_CH interrupt and sets AUDIOACC/DEBUGACC bits in the Type register (0x12) upon detection - all without host CPU polling.
FUSB301ATMX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- 12-XFQFN
- Programmable:
- Not Verified
- Protocol:
- USB
- Function:
- Controller
- Interface:
- I2C, USB
- Standards:
- -
- Voltage - Supply:
- 2.8V ~ 5.5V
- Current - Supply:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 12-UTMLP (1.6x1.6)
- Grade:
- -
- Qualification:
- -
FUSB301ATMX FAQ
1.How can I place an order for FUSB301ATMX through Aetrix?
Please submit a Request for Quotation (RFQ) for FUSB301ATMX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for FUSB301ATMX reliable?
The price and inventory of FUSB301ATMX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for FUSB301ATMX is usually 5 days.
3.What payment methods are accepted for FUSB301ATMX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for FUSB301ATMX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for FUSB301ATMX?
FUSB301ATMX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your FUSB301ATMX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for FUSB301ATMX?
For technical support, including FUSB301ATMX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your FUSB301ATMX requirements.
6.How does Aetrix verify that FUSB301ATMX is sourced from the original manufacturer or authorized distributors?
All FUSB301ATMX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that FUSB301ATMX meets industry standards.
7.What is the process for return or replacement of FUSB301ATMX?
All FUSB301ATMX units undergo pre-shipment inspection (PSI). If there is an issue with FUSB301ATMX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The FUSB301ATMX part is unused and in its original packaging.
Return procedure for FUSB301ATMX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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