STMicroelectronics HCF4053M013TR

Overview

HCF4053M013TR from STMicroelectronics is a triple 2-channel analog multiplexer/demultiplexer in SO-16 package, featuring low ON resistance (125 Ω typ. at VDD–VEE = 15 V), high OFF isolation (±100 pA channel leakage at 18 V), and ±20 V peak-to-peak analog signal handling. It supports binary address decoding on-chip and operates across 3–20 V digital supply with matched switch characteristics (ΔRON ≤ 5 Ω typ.). Used in precision analog routing for test equipment and sensor signal conditioning.

For engineers reviewing the HCF4053M013TR datasheet, HCF4053M013TR pinout, HCF4053M013TR application, or HCF4053M013TR equivalent, key selection criteria include guaranteed RON matching, sub-0.5% THD at 1 kHz, quiescent current spec up to 20 V, and dual-supply operation with VEE support down to –13.5 V.

Technical Context

The HCF4053M013TR implements three independent SPDT analog switches controlled by binary inputs A/B/C and a global INH inhibit. Each switch conducts bidirectionally with symmetrical RON and minimal charge injection, enabling accurate analog signal routing without polarity bias.

Its CMOS B-series architecture meets JEDEC JESD13B, supporting rail-to-rail analog swing from VEE to VDD while maintaining < 0.2 µW typical quiescent power dissipation across full logic states and supply ranges (VDD–VSS = 3–20 V, VDD–VEE ≤ 20 V).

Key Specifications

Pinout & Package

SO-16 surface-mount package (JEDEC MO-136AA, 9.8 × 5.8 mm body, 1.27 mm pitch). Pinout validated per STMicroelectronics datasheet HCF4053B Rev 3 (2002), page 3.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog multiplexer applications.

Compared with CD4053BE and ADG1414BRUZ, the HCF4053M013TR uniquely balances SO-16 compactness, VEE-enabled asymmetric analog range, sub-0.5% THD, and < 5 Ω RON matching-making it optimal for space-constrained industrial and test equipment requiring flexible rail configuration.

Availability

HCF4053M013TR is available at Aetrix Electronics and suitable for automated test equipment, industrial sensor signal conditioning, and medical instrumentation front-ends requiring stable component supply and long-term obsolescence management.

Supply support for HCF4053M013TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and MEMS products for industrial, automotive, and consumer markets.

The HCF4053B series belongs to ST's legacy B-series CMOS logic family, engineered specifically for robust analog switching in harsh environments with wide supply tolerance and guaranteed JEDEC JESD13B compliance.

FAQ

Can HCF4053M013TR operate with VDD = 5 V and VEE = –12 V?

Yes. With VDD = 5 V and VSS = 0 V, VEE may be set to –12 V provided VDD–VSS ≥ 4.5 V (satisfied here). The analog signal range becomes –12 V to +5 V (17 V p-p), within the device's 20 V p-p rating. Logic inputs remain referenced to VSS = 0 V, so address signals must be 0–5 V.

What is the maximum recommended load capacitance for maintaining 60 MHz bandwidth?

The 60 MHz –3 dB bandwidth is specified with CL = 50 pF. Exceeding this (e.g., >100 pF) reduces bandwidth significantly due to RON–CL time constant; for loads >1 nF, bandwidth drops below 1 MHz. Use local buffering or reduce trace capacitance to preserve high-frequency response.

Does the INH pin override A/B/C inputs even when they are floating?

No. Floating A/B/C inputs are undefined and may cause partial or erratic switching. INH only forces all channels OFF when driven actively high (VIH ≥ 3.5 V at VDD = 5 V). Always tie unused address lines to VSS or VDD via pull-down/up resistors to ensure deterministic behavior.

How does temperature affect ON resistance matching (ΔRON)?

ΔRON remains ≤ 10 Ω over –55°C to +125°C per datasheet Table 4. At 125°C, RON increases ~20% vs. 25°C, but tracking between channels stays tight due to monolithic construction-critical for ratiometric measurements in thermal monitoring systems.