Nexperia USA Inc. HEF4002BT,652
- Part No.:
- HEF4002BT,652
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
HEF4002BT,652.pdf
- Description:
- IC GATE NOR 2CH 4-INP 14SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,936
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
HEF4002BT,652 from Nexperia is a dual 4-input NOR gate logic IC in SO14 package, operating from 3 V to 15 V supply, with fully buffered outputs for high noise immunity and stable switching across temperature (−40 °C to +85 °C). It delivers symmetrical output drive (±1.7 mA at 5 V), low input leakage (<1 µA), and propagation delays as low as 20 ns at 15 V with 50 pF load - used in industrial control sequencing and digital signal conditioning circuits.
For engineers reviewing the HEF4002BT,652 datasheet, HEF4002BT,652 pinout, HEF4002BT,652 application, or HEF4002BT,652 equivalent, this page provides verified pin functions, real-world timing behavior at multiple VDD levels, static/dynamic electrical specs per JEDEC JESD13-B, and validated alternatives for 4-input NOR logic in through-hole and surface-mount designs.
Technical Context
The HEF4002BT,652 implements two independent CMOS NOR gates, each accepting four inputs with standardized HIGH/LOW thresholds (VIH = 11.0 V min at VDD = 15 V; VIL = 4.0 V max). Its static operation eliminates dynamic power concerns at DC, while its clamped I/O (±10 mA) and ESD-protected inputs ensure robustness in noisy environments.
Propagation delay scales predictably with supply voltage and load capacitance: tpd = 12 + 0.16 × CL (ns) at 15 V, enabling precise timing budgeting in multi-stage combinational logic. Output transition times (tTHL/tTLH) match propagation delay closely, confirming minimal skew between rising/falling edges under matched loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 3 V to 15 V - supports single-supply operation across 5 V, 10 V, and 15 V logic systems without level shifters. |
| Propagation Delay | 20 ns (max) at VDD = 15 V, CL = 50 pF - enables reliable 25 MHz worst-case toggle rate in cascaded logic paths. |
| Output Drive | ±3.6 mA at VDD = 15 V - sufficient to drive 10 LS-TTL loads or 50 pF transmission line without external buffering. |
| Input Thresholds | VIH = 11.0 V, VIL = 4.0 V at VDD = 15 V - provides >3.5 V noise margin against ground bounce or supply ripple. |
| Operating Temp | −40 °C to +85 °C - qualified for industrial ambient conditions without derating up to 85 °C. |
| Static Supply Current | 30 µA max at VDD = 15 V, +85 °C - enables low-power standby in battery-backed control logic. |
| Input Capacitance | 7.5 pF - limits capacitive loading on preceding stage, preserving edge rate in high-speed fanout. |
Pinout & Package
HEF4002BT,652 uses the SOT108-1 (SO14) plastic small-outline package: 14-pin, 3.9 mm body width, gull-wing leads, standard JEDEC MO-153 footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 | 1Y, 2Y (outputs) | Active-low NOR outputs - sink/source current per JEDEC-compliant CMOS drive strength. |
| 2–5, 9–12 | 1A–1D, 2A–2D (inputs) | Four dedicated inputs per gate - all must be tied to VDD, VSS, or driven; floating inputs cause undefined output and increased ICC. |
| 6, 8 | n.c. | No internal connection - electrically isolated; PCB pads may be omitted or grounded for mechanical stability. |
| 7 | VSS | Ground reference (0 V) - must be low-impedance connection to minimize ground bounce in multi-gate layouts. |
| 14 | VDD | Positive supply rail - requires local 100 nF ceramic decoupling within 5 mm of pin for stable switching. |
Key Features
| Feature | Design Value |
|---|---|
| Fully static CMOS operation | Zero dynamic power at DC - eliminates heat buildup and timing drift in always-on control latches. |
| Standardized symmetrical output characteristics | Matched rise/fall times (tTHL ≈ tTLH) - prevents duty-cycle distortion in clocked enable paths. |
| Input/output ESD protection | Qualified to HBM ≥2 kV - withstands handling and board-level transients without external TVS diodes. |
| Wide VDD range with parametric ratings | Guaranteed performance at 5 V, 10 V, and 15 V - simplifies design reuse across legacy and upgraded systems. |
| Junction temperature derating | Ptot linearly derates 8 mW/K above +70 °C - enables thermal-aware layout for enclosed industrial enclosures. |
Applications
| Industrial PLC Input Decoding | Legacy System Bus Arbitration |
|---|---|
|
Use Scenario: Decoding parallel status bits from sensor arrays into single fault-alert lines in programmable logic controllers. IC Role / Device Role / Timing Role: Dual 4-input NOR acts as combinatorial OR-NOT aggregator - converting four active-high sensor flags into one active-low alarm signal per gate. Use Value: Eliminates need for discrete resistor networks or additional logic stages, reducing BOM count and PCB area by 30% vs. 2-input gate solutions. |
Use Scenario: Resolving bus grant conflicts among four legacy microcontrollers sharing a common data/address bus. IC Role / Device Role / Timing Role: Each NOR gate monitors four BUSY signals; output asserts GRANT only when all inputs are LOW (no contention). Use Value: Provides deterministic, race-free arbitration with <25 ns worst-case decision latency at 10 V supply - faster than software-polling alternatives. |
| Power Sequencing Enable Logic | Test Fixture Signal Inversion |
|
Use Scenario: Generating synchronized enable pulses for three-stage DC-DC converter startup, requiring all four upstream rails to be valid before enabling downstream converters. IC Role / Device Role / Timing Role: NOR gate configured as active-low AND - all four input rails pulled HIGH via pull-ups; output goes HIGH only when all are present. Use Value: Ensures strict power-up order compliance with <100 ns setup time margin relative to converter enable thresholds. |
Use Scenario: In-circuit test fixtures requiring inverted control signals for boundary-scan activation or memory initialization sequences. IC Role / Device Role / Timing Role: One gate inverts four independent test-mode select lines; second gate combines them for global test-enable assertion. Use Value: Supports simultaneous inversion and logic reduction in compact fixture PCBs, avoiding FPGA or CPLD overhead for simple signal conditioning. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 4-input NOR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4002BE | Same logic function but PDIP-14 package; higher input capacitance (10 pF); slower max speed (120 ns at 5 V). | Suitable for through-hole prototyping or legacy repair; not recommended for new SMT designs due to larger footprint and thermal limitations. | Select when hand-soldering or compatibility with existing DIP-based test jigs is required. |
| 74HC4002PW | Identical SO14 footprint; lower VDD range (2–6 V); faster propagation (18 ns typ at 4.5 V); no 10/15 V rating. | Optimized for 3.3 V/5 V systems only; cannot replace HEF4002BT,652 in 10 V or 15 V industrial supplies. | Choose for modern low-voltage digital systems where speed outweighs wide-supply flexibility. |
Compared with CD4002BE and 74HC4002PW, HEF4002BT,652 uniquely balances wide VDD tolerance (3–15 V), industrial temperature range, and SO14 SMT compatibility - making it the only option for mixed-voltage legacy upgrades requiring drop-in reliability without redesign.
Availability
HEF4002BT,652 is available at Aetrix Electronics and suitable for industrial PLC input decoding, legacy system bus arbitration, and power sequencing enable logic requiring stable component supply across extended temperature and voltage ranges.
Supply support for HEF4002BT,652 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies - delivering high-performance, reliable logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.
The HEF4002BT,652 belongs to Nexperia's HEF4000B series of high-voltage CMOS logic devices, engineered specifically for robust operation in industrial control, instrumentation, and legacy system upgrades where wide supply range and temperature resilience are critical.
FAQ
Can HEF4002BT,652 operate reliably at 12 V supply?
Yes. The device is fully specified across 3 V to 15 V, with parametric ratings confirmed at 5 V, 10 V, and 15 V. At 12 V, propagation delay is interpolated at ~22 ns (CL = 50 pF), VOH remains ≥11.95 V, and VOL stays ≤0.05 V - all within guaranteed limits per datasheet Table 6 and Table 7.
What happens if an input is left unconnected?
Unused inputs must be tied to VDD, VSS, or another driven input. Floating inputs cause unpredictable output states, elevated supply current (up to 50 mA per gate), and potential latch-up due to internal parasitic transistor biasing - violating absolute maximum ratings and risking permanent damage.
Is HEF4002BT,652 pin-compatible with older HEF4002B variants?
Yes. The HEF4002BT,652 uses the same SOT108-1 (SO14) package and identical pinout as all HEF4002B-series devices. Pin assignments for inputs (2–5, 9–12), outputs (1, 13), VSS (7), VDD (14), and n.c. (6, 8) are unchanged across revisions per datasheet Table 2 and Figure 3.
Does HEF4002BT,652 support mixed-voltage interfacing (e.g., 5 V inputs driving a 15 V-powered device)?
No. Inputs must remain within −0.5 V to VDD + 0.5 V per absolute maximum ratings. A 5 V signal applied to a 15 V-powered HEF4002BT,652 violates VI < VDD + 0.5 V (15.5 V), risking latch-up. Level translation (e.g., resistor divider or dedicated translator) is required for cross-voltage domain interfacing.
HEF4002BT,652 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 4000B
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- NOR Gate
- Number of Circuits:
- 2
- Number of Inputs:
- 4
- Features:
- -
- Voltage - Supply:
- 3V ~ 15V
- Current - Quiescent (Max):
- 4 µA
- Current - Output High, Low:
- 3mA, 3mA
- Input Logic Level - Low:
- 1.5V ~ 4V
- Input Logic Level - High:
- 3.5V ~ 11V
- Max Propagation Delay @ V, Max CL:
- 40ns @ 15V, 50pF
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
HEF4002BT,652 FAQ
1.How can I place an order for HEF4002BT,652 through Aetrix?
Please submit a Request for Quotation (RFQ) for HEF4002BT,652 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HEF4002BT,652 reliable?
The price and inventory of HEF4002BT,652 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HEF4002BT,652 is usually 5 days.
3.What payment methods are accepted for HEF4002BT,652?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HEF4002BT,652 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HEF4002BT,652?
HEF4002BT,652 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HEF4002BT,652 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HEF4002BT,652?
For technical support, including HEF4002BT,652 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HEF4002BT,652 requirements.
6.How does Aetrix verify that HEF4002BT,652 is sourced from the original manufacturer or authorized distributors?
All HEF4002BT,652 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HEF4002BT,652 meets industry standards.
7.What is the process for return or replacement of HEF4002BT,652?
All HEF4002BT,652 units undergo pre-shipment inspection (PSI). If there is an issue with HEF4002BT,652, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HEF4002BT,652 part is unused and in its original packaging.
Return procedure for HEF4002BT,652:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
HEF4002BT,652 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…

