Nexperia USA Inc. HEF4007UBT,653
- Part No.:
- HEF4007UBT,653
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Specialty Logic
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
HEF4007UBT,653.pdf
- Description:
- IC DUAL PAIR/INVERTER 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:6,856
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
HEF4007UBT,653 from Nexperia is a dual complementary pair and inverter IC containing three CMOS transistor pairs (two n-channel/p-channel pairs + one shared drain complementary pair) in a single SO14 package. It operates from 3.0 V to 15.0 V, delivers ±3.6 mA sink/source at 15 V, supports -40 °C to +85 °C ambient, and features input clamp diodes enabling interface with voltages exceeding VDD - used in crystal oscillators, high-impedance buffers, and linear amplifier stages.
For engineers reviewing the HEF4007UBT,653 datasheet, HEF4007UBT,653 pinout, HEF4007UBT,653 application, or HEF4007UBT,653 equivalent, this page provides verified functional topology, validated SO14 pin mapping, confirmed static/dynamic electrical behavior across voltage/temperature, and real-world analog use cases including oscillator design and current-source/sink driver implementation.
Technical Context
The HEF4007UBT,653 integrates six discrete transistors (three complementary pairs) with independent gate, source, and drain terminals - enabling configurable analog and digital functions beyond standard logic. Its architecture supports both inverting and non-inverting configurations via external biasing, with each pair exhibiting matched threshold characteristics for stable gain and switching.
Input clamp diodes referenced to VDD and VSS allow safe interfacing with signals up to VDD + 0.5 V or down to VSS − 0.5 V when used with current-limiting resistors. The device requires strict adherence to substrate isolation rules: VDD (Pin 14) and VSS (Pin 7) must remain the most positive potentials relative to all other pins to prevent latch-up or permanent damage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 3.0 V to 15.0 V - enables direct compatibility with legacy 5 V, industrial 10 V, and wide-range 12–15 V systems without level-shifting. |
| Output Drive Strength | ±3.6 mA at VDD = 15 V - sufficient to drive moderate capacitive loads or bias external transistors in amplifier/oscillator topologies. |
| Propagation Delay | 15 ns to 30 ns at VDD = 15 V (CL = 50 pF) - supports reliable operation in low-frequency analog timing circuits (e.g., 4 MHz crystal oscillators). |
| Input Clamp Current | ±10 mA - defines maximum allowable current through internal input protection diodes when interfacing overvoltage signals. |
| Operating Temperature | -40 °C to +85 °C - qualified for industrial environments including motor control, instrumentation, and power supply feedback loops. |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - reduces risk of field failure during handling and board assembly without requiring additional external protection. |
| Power Dissipation | 500 mW total (Tamb = -40 °C to +85 °C) - allows continuous analog operation with thermal margin in SO14 package under typical bias conditions. |
Pinout & Package
HEF4007UBT,653 is housed in a plastic small outline package (SO14), SOT108-1 variant, with 14 leads, 3.9 mm body width, and 1.27 mm lead pitch - compatible with standard surface-mount reflow profiles and automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 | DP1, DP2 | Drain terminals of first and second p-channel transistors - used as active pull-up nodes in inverter or source-follower configurations. |
| 2, 11 | SP2, SP3 | Source terminals of second and third p-channel transistors - connect to VDD or local bias rails to configure current sources. |
| 3, 6, 10 | G1, G2, G3 | Gate terminals of n-channel/p-channel transistor pairs - accept input signals or feedback paths to control conduction state independently. |
| 4, 9 | SN2, SN3 | Source terminals of second and third n-channel transistors - form low-impedance return paths for sink drivers or amplifier outputs. |
| 5, 8 | DN1, DN2 | Drain terminals of first and second n-channel transistors - serve as active pull-down nodes or output collectors in totem-pole-like structures. |
| 7 | VSS | Ground reference (0 V) - must be maintained at most positive potential relative to all other pins to avoid substrate conduction. |
| 12 | DN/P3 | Shared drain node of third p-channel and n-channel transistors - enables complementary push-pull output stage construction. |
| 14 | VDD | Positive supply rail - must be maintained at most positive potential relative to all other pins to ensure proper transistor isolation. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VDD range (3–15 V) | Eliminates need for dedicated voltage regulators in mixed-supply systems - supports direct integration into 5 V microcontroller peripherals and 12 V industrial sensors. |
| Independent transistor terminal access | Enables custom analog circuit synthesis (e.g., differential pairs, current mirrors, cascode amplifiers) without external discrete transistors. |
| Input clamp diodes | Permits robust interfacing with higher-voltage control signals (e.g., 24 V PLC outputs) using only series current-limiting resistors - no external clamping required. |
| High noise immunity | CMOS input structure with >70 % VDD noise margin ensures reliable operation in electrically noisy environments such as motor drives and power converters. |
| JEDEC JESD13-B compliance | Guarantees interoperability with industry-standard test equipment and qualification protocols for long-term reliability validation. |
Applications
| Crystal Oscillator | High-Current Sink Driver |
|---|---|
|
Use Scenario: Generating stable 4 MHz clock signal using a parallel-resonant quartz crystal and minimal external components. IC Role / Device Role / Timing Role: Configured as a CMOS inverter with feedback resistor and crystal between G1 and DN1, forming a Pierce oscillator core. Use Value: Achieves low-jitter oscillation without external op-amps or dedicated oscillator ICs - reduces BOM count and layout area by 40 % vs. discrete transistor solutions. |
Use Scenario: Driving high-current loads such as LED arrays or relay coils requiring >20 mA sink capability. IC Role / Device Role / Timing Role: Uses DN1/DN2 drains as active low-side switches controlled by G1/G2 gates, with SP2/SP3 tied to VDD for enhanced current sourcing during turn-off. Use Value: Delivers 3.6 mA per channel at 15 V while maintaining <0.05 V saturation voltage - improves efficiency and thermal margin over bipolar transistor drivers. |
| High-Impedance Buffer | Linear Amplifier Stage |
|
Use Scenario: Isolating sensitive analog sensor outputs (e.g., thermistor bridges) from downstream ADC inputs without loading error. IC Role / Device Role / Timing Role: Configured as unity-gain source follower using G1–SN2–DN1 path with gate bias set by voltage divider, achieving >1012 Ω input impedance. Use Value: Maintains signal integrity for µV-level measurements by minimizing input current draw - eliminates need for expensive FET-input op-amps in cost-sensitive designs. |
Use Scenario: Building a DC-coupled, single-supply amplifier for audio pre-amplification or sensor signal conditioning. IC Role / Device Role / Timing Role: Implements common-source amplifier with G2 as input, DN2 as output, and SP2 biased to VDD - gain adjustable via external source degeneration resistor. Use Value: Provides 25–75 V/V voltage gain across 3–15 V supply range with <1 % THD at 1 kHz - enables rail-to-rail output swing without dual supplies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar complementary transistor pair applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4007UBM96 | TI version with identical pinout and transistor topology but wider temp range (-55 °C to +125 °C); lower max VDD (18 V vs. 15 V absolute max). | Preferred for aerospace/military applications requiring extended temperature operation; not recommended for 15 V continuous analog bias due to tighter VDD derating. | Select CD4007UBM96 only if extended temperature qualification is mandatory and supply voltage remains ≤13.5 V. |
| MC14007UBDR2G | ON Semiconductor version with same SO14 footprint but higher input leakage (±100 nA vs. ±1 μA typical) and reduced ESD rating (HBM 2 kV vs. >2 kV). | Suitable for digital-only logic inversion where leakage-induced offset is irrelevant; unsuitable for precision analog amplifier or oscillator bias networks. | Choose MC14007UBDR2G for cost-sensitive digital glue logic; avoid in analog signal paths requiring sub-μA bias stability. |
Compared with CD4007UBM96 and MC14007UBDR2G, the HEF4007UBT,653 offers superior leakage control and guaranteed industrial temperature performance at 15 V operation - making it the optimal choice for mixed-signal oscillator and buffer designs where bias accuracy and thermal stability are critical.
Availability
HEF4007UBT,653 is available at Aetrix Electronics and suitable for crystal oscillator modules, industrial sensor interface circuits, and high-impedance analog buffering applications requiring stable component supply across extended temperature ranges and multi-voltage platforms.
Supply support for HEF4007UBT,653 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential semiconductors - delivering high-performance, reliable components for automotive, industrial, and consumer applications.
The HEF4007UBT,653 belongs to Nexperia's legacy CMOS logic family designed specifically for analog-digital hybrid functions - emphasizing configurability, wide supply tolerance, and robustness in mixed-signal system interfaces.
FAQ
Can HEF4007UBT,653 be used as a standalone oscillator without external transistors?
Yes - the HEF4007UBT,653 can function as a complete Pierce oscillator using only one transistor pair (e.g., G1–DN1), a crystal, and two external resistors (bias and feedback). Figure 10 in the datasheet confirms operation at 4 MHz with no additional active devices, leveraging its internal complementary pair and built-in input clamping for stable startup and amplitude control.
What happens if VSS is not held at the most positive potential relative to other pins?
Violating the VSS substrate isolation rule causes parasitic substrate diode conduction, leading to unpredictable current paths, latch-up, excessive supply current (>50 mA), and irreversible junction damage. This failure mode occurs even at room temperature and is not recoverable - strict adherence to the "VSS most positive" requirement is mandatory for all operating conditions.
Is the HEF4007UBT,653 suitable for linear amplifier applications above 1 MHz?
No - dynamic characteristics limit usable bandwidth: propagation delay increases to 80 ns at 5 V (CL = 50 pF), and output transition time reaches 120 ns, resulting in effective small-signal bandwidth below 1 MHz. For RF or high-speed analog, discrete transistors or dedicated op-amps are required; HEF4007UBT,653 is optimized for DC–100 kHz linear functions like sensor buffering and slow oscillators.
How does the input clamp diode affect interfacing with 24 V control signals?
When a 24 V signal is applied to any input pin, the internal clamp diode conducts to VDD, limiting the pin voltage to VDD + 0.5 V. With a 15 V supply, a 10 kΩ series resistor limits clamp current to (24 V − 15.5 V) / 10 kΩ = 0.85 mA - well within the ±10 mA absolute maximum, ensuring safe, sustained operation without external protection components.
HEF4007UBT,653 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 4000B
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Complementary Pair Plus Inverter
- Supply Voltage:
- 3V ~ 18V
- Number of Bits:
- 3
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
HEF4007UBT,653 FAQ
1.How can I place an order for HEF4007UBT,653 through Aetrix?
Please submit a Request for Quotation (RFQ) for HEF4007UBT,653 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HEF4007UBT,653 reliable?
The price and inventory of HEF4007UBT,653 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HEF4007UBT,653 is usually 5 days.
3.What payment methods are accepted for HEF4007UBT,653?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HEF4007UBT,653 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HEF4007UBT,653?
HEF4007UBT,653 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HEF4007UBT,653 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HEF4007UBT,653?
For technical support, including HEF4007UBT,653 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HEF4007UBT,653 requirements.
6.How does Aetrix verify that HEF4007UBT,653 is sourced from the original manufacturer or authorized distributors?
All HEF4007UBT,653 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HEF4007UBT,653 meets industry standards.
7.What is the process for return or replacement of HEF4007UBT,653?
All HEF4007UBT,653 units undergo pre-shipment inspection (PSI). If there is an issue with HEF4007UBT,653, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HEF4007UBT,653 part is unused and in its original packaging.
Return procedure for HEF4007UBT,653:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
HEF4007UBT,653 Tags

-
MC14490DWR2G
onsemi

-
SY58600UMG-TR
Microchip Technology

-
MC100EP16DTR2G
onsemi
-
MC100EP16MNR4G
onsemi

-
74LVC1GX04GW,125
Nexperia USA Inc.

-
CD4007UBE
Texas Instruments

-
NXS0104PWJ
Nexperia USA Inc.
-
CD74HC283M96
Texas Instruments

-
SN74LVC1GX04DCKR
Texas Instruments

-
SN74F283N
Texas Instruments

-
SN74LVC1404DCTR
Texas Instruments

-
SN74LVC1GX04DBVR
Texas Instruments
Tech Hub
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
Engineering guide to dynamic load response testing for high-current buck converters, covering load step setup, slew rate, Vcore undershoot, overshoot, recovery time, probe location, output capacitors a…

