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Nexperia USA Inc. HEF4013BT,652

Part No.:
HEF4013BT,652
Manufacturer:
Nexperia USA Inc.
Category:
Flip Flops
Package:
14-SOIC (0.154", 3.90mm Width)
Datasheet:
AetrixHEF4013BT,652.pdf
Description:
IC FF D-TYPE DUAL 1BIT 14SO
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,793

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Product details

Overview

HEF4013BT,652 from Nexperia is a dual D-type flip-flop with independent asynchronous set and reset inputs, positive-edge clock triggering, and Schmitt-trigger clock inputs for robust timing in noisy environments. It operates across 3.0 V to 15.0 V supply, supports -40 °C to +125 °C ambient range, and delivers symmetrical CMOS output drive (±4.2 mA at 15 V). It is used in binary counters, shift registers, and toggle configurations where deterministic edge-triggered storage is required.

For engineers reviewing the HEF4013BT,652 datasheet, HEF4013BT,652 pinout, HEF4013BT,652 application, or HEF4013BT,652 equivalent, key selection factors include its wide VDD range (3–15 V), guaranteed operation up to +125 °C, Schmitt-trigger clock tolerance for slow edges, dual independent flip-flop architecture, and SO14 package compatibility with legacy 4000-series logic footprints.

Technical Context

The HEF4013BT implements two identical, electrically isolated D-type flip-flops, each with separate data (D), clock (CP), set-direct (SD), and clear-direct (CD) inputs, plus true (Q) and complement (Q̅) outputs. All control inputs are active-HIGH asynchronous, and the clock input features Schmitt-trigger hysteresis to suppress noise-induced false triggering on slow-rising signals.

Its static CMOS design ensures zero static current draw, while dynamic power scales linearly with clock frequency and load capacitance. Propagation delays are specified down to 12 ns (tPLH, 15 V, CL = 50 pF), and setup/hold times remain valid across the full temperature and voltage range - enabling reliable use in industrial timing and control circuits without external conditioning.

Key Specifications

Parameter Value and Actual Design Meaning
Supply Voltage (VDD) 3.0 V to 15.0 V - Enables direct interface with 5 V, 10 V, and 15 V logic systems without level shifting.
Operating Temperature -40 °C to +125 °C - Qualified for under-hood automotive, industrial motor control, and harsh-environment embedded applications.
Max Clock Frequency 40 MHz at 15 V - Supports high-speed counting and register update rates in real-time digital state machines.
Output Drive (IOL/IOH) ±4.2 mA at 15 V - Sufficient to directly drive multiple 4000-series inputs or small LED loads without buffering.
Input Hysteresis Schmitt-trigger on CP - Eliminates need for external RC filtering on clock lines in electrically noisy environments.
Propagation Delay (tPHL) 30 ns typical at 15 V, CL = 50 pF - Predictable timing margin for synchronous logic design with minimal skew.
ESD Protection HBM > 2000 V, CDM > 1000 V - Robust handling during PCB assembly and field service without additional protection circuitry.

Pinout & Package

HEF4013BT,652 is housed in a plastic small outline package (SO14), SOT108-1, with 14 leads and 3.9 mm body width. The package is RoHS-compliant, surface-mountable, and compatible with standard reflow profiles.

Pin/Terminal Circuit Role Design Meaning
1, 13 (1Q, 2Q) True output Active-HIGH Q output per flip-flop; drives downstream logic or indicators with rail-to-rail swing.
2, 12 (1Q̅, 2Q̅) Complement output Active-LOW inverted output; enables toggle, T-type, or differential signaling without external inverters.
3, 11 (1CP, 2CP) Clock input Positive-edge triggered; Schmitt-triggered for noise immunity on slow or degraded clock edges.
4, 10 (1CD, 2CD) Asynchronous clear Active-HIGH reset - forces Q = LOW regardless of clock or data state; overrides all other inputs.
5, 9 (1D, 2D) Data input Sampled on rising clock edge; latched value appears at Q after propagation delay.
6, 8 (1SD, 2SD) Asynchronous set Active-HIGH preset - forces Q = HIGH independently of clock; used for initialization or fault recovery.
7 Ground (VSS) 0 V reference for all inputs and outputs; must be low-impedance for stable noise margin.
14 Supply (VDD) Primary power rail; decoupling capacitor (100 nF) recommended within 5 mm of this pin.

Key Features

Feature Design Value
Wide VDD range (3–15 V) Eliminates need for separate voltage regulators when interfacing mixed-voltage subsystems (e.g., 5 V microcontroller + 12 V sensor interface).
Schmitt-trigger clock inputs Enables reliable operation with RC-generated clocks, mechanical switch debouncing, or long trace routing without added hysteresis circuitry.
Fully static CMOS design Zero quiescent current at DC - critical for battery-powered counters, timers, and always-on status latches.
Asynchronous set/clear per flip-flop Allows independent initialization or forced reset of each stage in multi-stage counters or shift registers without global reset coordination.
JEDEC JESD13-B compliance Ensures interoperability with legacy 4000B-series logic families and simplifies drop-in replacement in existing designs.

Applications

Binary Ripple Counter Toggle Flip-Flop

Use Scenario: A 4-bit binary counter built by cascading four HEF4013BT devices, dividing a 1 MHz clock to generate 62.5 kHz, 31.25 kHz, 15.625 kHz, and 7.8125 kHz outputs.

IC Role / Device Role / Timing Role: Each HEF4013BT provides one stage of divide-by-2; Q̅ output feeds next stage's D input to ensure synchronous toggling on every clock edge.

Use Value: Achieves precise integer division without external feedback resistors or timing capacitors - reducing BOM count and layout area.

Use Scenario: A single HEF4013BT configured as a toggle flip-flop using Q̅ feedback to D input, generating a 50% duty-cycle square wave from an irregular input clock.

IC Role / Device Role / Timing Role: Acts as a synchronous edge-triggered toggle element; clock edge initiates state transition, eliminating metastability risks of asynchronous toggling.

Use Value: Produces clean, jitter-free divided clock signals even from noisy or slow-rising sources due to Schmitt-trigger clock input.

Shift Register Stage Industrial Status Latch

Use Scenario: One HEF4013BT used as the first stage of a 3-stage serial-in/parallel-out shift register controlling three relay drivers in a PLC I/O module.

IC Role / Device Role / Timing Role: Captures serial data bits on rising clock edges and holds them stable until next clock cycle; Q and Q̅ drive complementary relay enable/disable paths.

Use Value: Provides galvanically isolated data staging with dual outputs - enabling fail-safe relay control where Q asserts and Q̅ de-asserts simultaneously.

Use Scenario: Monitoring emergency stop button status in a CNC machine controller, where HEF4013BT latches the first press and holds until manually cleared via front-panel reset.

IC Role / Device Role / Timing Role: Functions as a non-volatile status memory cell; SD sets latch on E-stop activation, CD clears it only upon operator confirmation.

Use Value: Guarantees fault persistence across power cycles or microcontroller resets - no software polling or volatile RAM required.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual D-type flip-flop applications.

Alternative Part Technical Difference Application Difference Selection Advice
CD4013BE Same pinout and function but rated only to +85 °C; lacks Schmitt-trigger clock input; higher propagation delay (150 ns typ @ 5 V). Not suitable for automotive or extended-temperature industrial use; requires cleaner clock edges and external hysteresis if noise is present. Select only for cost-sensitive consumer-grade designs operating ≤ +85 °C with well-conditioned clocks.
74HC74D Higher speed (100 MHz max @ 5 V) but narrower VDD range (2–6 V); no Schmitt-trigger; not rated beyond +125 °C. Cannot replace HEF4013BT in 12 V or 15 V systems; unsuitable for high-temp environments like motor drives or power supplies. Prefer for high-frequency 5 V digital systems where temperature stays below +85 °C and clock edges are fast and clean.

Compared with CD4013BE and 74HC74D, HEF4013BT offers unique combination of extended temperature rating (+125 °C), wide supply range (3–15 V), and integrated Schmitt-trigger clock - making it the only choice for ruggedized, mixed-voltage, noise-prone industrial control logic.

Availability

HEF4013BT,652 is available at Aetrix Electronics and suitable for industrial motor control, programmable logic controllers, and automotive body electronics requiring stable component supply across extended temperature ranges and mixed-voltage architectures.

Supply support for HEF4013BT,652 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading Dutch semiconductor manufacturer specializing in high-performance logic, analog, and discrete components, with emphasis on reliability, efficiency, and automotive-grade qualification.

The HEF4013BT belongs to Nexperia's 4000B-series logic family, designed for backward compatibility with legacy CMOS systems while delivering enhanced ESD robustness, wider voltage operation, and extended temperature capability for modern industrial upgrades.

FAQ

What is the maximum clock frequency supported by HEF4013BT,652 at 12 V?

At VDD = 12 V, the maximum clock frequency is 35 MHz (interpolated from datasheet fclk(max) values: 28 MHz at 10 V, 40 MHz at 15 V). This is verified in Table 7 under "fclk(max)" with test conditions matching Tamb = 25 °C and CL = 50 pF. Operation above this frequency may result in setup/hold violations or metastability.

Can HEF4013BT,652 be used with a 3.3 V microcontroller I/O?

No - HEF4013BT,652 has VIH(min) = 11.0 V at VDD = 15 V and 3.5 V at VDD = 5 V, meaning its input high threshold is ~70% of VDD. At 3.3 V supply, VIH would be ~2.3 V, exceeding typical 3.3 V MCU VOH (2.4–2.6 V under load). Use level-shifting or select a 74LVC-series device instead.

Does HEF4013BT,652 require external pull-up or pull-down resistors on unused inputs?

Yes - unused SD, CD, D, and CP inputs must be tied to VDD or VSS. Floating CMOS inputs cause increased supply current, unpredictable logic states, and potential thermal overstress. The datasheet explicitly warns against leaving inputs unconnected in Section 1, General Description.

Is the SO14 package of HEF4013BT,652 compatible with lead-free reflow soldering?

Yes - the SOT108-1 package is RoHS-compliant and qualified for standard Pb-free reflow profiles (J-STD-020D), including peak temperatures up to 260 °C for 30 seconds. The package outline drawing in Figure 9 confirms JEDEC MS-012 compliance, and Nexperia's packaging documentation specifies lead-free assembly compatibility.

HEF4013BT,652 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
4000B
Package/Case:
14-SOIC (0.154", 3.90mm Width)
Packaging:
Tube
Product Status:
Obsolete
Function:
Set(Preset) and Reset
Type:
D-Type
Output Type:
Complementary
Number of Elements:
2
Number of Bits per Element:
1
Clock Frequency:
40 MHz
Max Propagation Delay @ V, Max CL:
60ns @ 15V, 50pF
Trigger Type:
Positive Edge
Current - Output High, Low:
3.4mA, 3.4mA
Voltage - Supply:
3V ~ 15V
Current - Quiescent (Iq):
4 µA
Input Capacitance:
7.5 pF
Operating Temperature:
-40°C ~ 125°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
14-SO

HEF4013BT,652 FAQ

1.How can I place an order for HEF4013BT,652 through Aetrix?

Please submit a Request for Quotation (RFQ) for HEF4013BT,652 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for HEF4013BT,652 reliable?

The price and inventory of HEF4013BT,652 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HEF4013BT,652 is usually 5 days.

3.What payment methods are accepted for HEF4013BT,652?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HEF4013BT,652 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for HEF4013BT,652?

HEF4013BT,652 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your HEF4013BT,652 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for HEF4013BT,652?

For technical support, including HEF4013BT,652 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HEF4013BT,652 requirements.

6.How does Aetrix verify that HEF4013BT,652 is sourced from the original manufacturer or authorized distributors?

All HEF4013BT,652 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HEF4013BT,652 meets industry standards.

7.What is the process for return or replacement of HEF4013BT,652?

All HEF4013BT,652 units undergo pre-shipment inspection (PSI). If there is an issue with HEF4013BT,652, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The HEF4013BT,652 part is unused and in its original packaging.

Return procedure for HEF4013BT,652:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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