Nexperia USA Inc. HEF4013BT,653
- Part No.:
- HEF4013BT,653
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Flip Flops
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
HEF4013BT,653.pdf
- Description:
- IC FF D-TYPE DUAL 1BIT 14SO
- Quantity:
- Payment:

- Shipping:

Inventory:8,377
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Product details
Overview
HEF4013BT,653 from Nexperia is a dual D-type flip-flop with independent asynchronous set and clear inputs, positive-edge clock triggering, and Schmitt-trigger clock inputs for robust timing in noisy environments. It operates across 3.0 V to 15.0 V supply, supports -40 °C to +125 °C ambient range, and delivers symmetrical CMOS output drive (±4.2 mA at 15 V). It is used in binary ripple counters, shift registers, and toggle configurations requiring deterministic edge-triggered storage.
For engineers reviewing the HEF4013BT,653 datasheet, HEF4013BT,653 pinout, HEF4013BT,653 application, or HEF4013BT,653 equivalent, key selection considerations include its wide VDD range, guaranteed operation up to +125 °C, Schmitt-trigger clock tolerance, dual independent flip-flop architecture, and SO14 (SOT108-1) package compatibility with legacy 4000-series logic layouts.
Technical Context
The HEF4013BT implements two identical, electrically isolated D-type flip-flops, each with separate asynchronous active-HIGH set (SD) and clear (CD) inputs, and a common-edge-triggered clock (CP). Its Schmitt-trigger input on CP enables reliable operation with slow-rising or noisy clock signals without external conditioning.
Each flip-flop follows strict synchronous D-latch behavior on the rising edge of CP while maintaining static retention between edges. The function table confirms deterministic outputs under all valid control combinations, including priority of asynchronous SD/CD over clocked data, with no metastability guarantees beyond specified setup/hold times (e.g., tsu = 15 ns, th = 0 ns at 15 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 3.0 V to 15.0 V - Enables direct interface with legacy 5 V, industrial 10 V, and high-voltage 15 V logic systems without level shifting. |
| Operating Temperature | -40 °C to +125 °C - Qualified for under-hood automotive, industrial motor control, and extended-temperature embedded applications. |
| Propagation Delay (tPHL/tPLH) | 30 ns max at 15 V, CL = 50 pF - Supports clock frequencies up to 40 MHz in critical timing paths with predictable edge alignment. |
| Output Drive Strength | ±4.2 mA at 15 V - Sufficient to directly drive multiple CMOS loads or low-capacitance transmission lines without buffering. |
| Input Hysteresis (Schmitt) | Typical 1.0 V at 5 V VDD - Rejects noise on clock lines with >1 V noise margin, eliminating need for external RC filtering. |
| ESD Protection | HBM >2000 V, CDM >1000 V - Robust handling during board assembly and field service without additional protection circuitry. |
| Static Power Dissipation | 120 μA max at 15 V, +125 °C - Enables ultra-low standby current in battery-backed or energy-constrained systems. |
Pinout & Package
HEF4013BT,653 is supplied in the SO14 plastic small outline package (SOT108-1), 14-pin, 3.9 mm body width, with standard 1.27 mm lead pitch and gull-wing leads compatible with automated reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 (1Q, 2Q) | True output | Active-HIGH Q output per flip-flop; drives complementary logic or downstream gates with full rail-to-rail swing. |
| 2, 12 (1Q, 2Q) | Complement output | Active-LOW Q̅ output; eliminates need for external inverters in toggle or differential signaling paths. |
| 3, 11 (1CP, 2CP) | Clock input | Positive-edge-triggered; Schmitt-trigger input ensures clean latching even with slow or noisy clocks (e.g., mechanical switch debouncing). |
| 4, 10 (1CD, 2CD) | Asynchronous clear | Active-HIGH reset - forces Q = LOW regardless of clock or data state; used for system initialization or fault recovery. |
| 5, 9 (1D, 2D) | Data input | Synchronous data latch point; value sampled only on rising CP edge and held until next valid edge. |
| 6, 8 (1SD, 2SD) | Asynchronous set | Active-HIGH preset - forces Q = HIGH independently of clock; enables fast state forcing in control sequencers. |
| 7 | Ground (VSS) | 0 V reference for all inputs and outputs; must be low-impedance return path to minimize ground bounce. |
| 14 | Supply (VDD) | Primary power rail; decoupling capacitor (100 nF) required within 5 mm for stable high-speed switching. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VDD range (3–15 V) | Eliminates voltage translation in mixed-supply systems and supports direct integration with analog front-ends or high-voltage peripherals. |
| Schmitt-trigger clock inputs | Enables reliable operation with RC-generated clocks, mechanical switch inputs, or long PCB traces without signal integrity degradation. |
| Fully static CMOS design | Zero static current draw at DC - essential for low-power hold modes and battery-operated state machines. |
| Standardized symmetrical outputs | Matched rise/fall times and drive strength simplify timing analysis and reduce skew in parallel data paths. |
| JEDEC JESD13-B compliance | Ensures interoperability with other 4000-series logic families and compatibility with legacy schematics and PCB footprints. |
Applications
| Binary Ripple Counter | Shift Register |
|---|---|
|
Use Scenario: Cascaded division-by-2 stages to generate precise frequency dividers (e.g., 1 MHz → 125 kHz → 15.625 kHz). IC Role / Device Role / Timing Role: Each HEF4013BT stage acts as a synchronous divide-by-2 element, with Q output feeding D input of next stage via direct wire connection. Use Value: Achieves exact integer division with zero accumulated jitter; no external feedback resistors or timing components required. |
Use Scenario: Serial-to-parallel conversion in microcontroller peripheral interfaces or LED matrix drivers. IC Role / Device Role / Timing Role: Dual flip-flops form two-bit register stages; shared CP synchronizes data capture, while SD/CD enable parallel load or clear. Use Value: Reduces MCU GPIO count by 4 pins per stage; eliminates need for dedicated shift-register ICs in cost-sensitive designs. |
| Toggle Flip-Flop | State Machine Sequencer |
|
Use Scenario: Debounced push-button control for LED on/off toggling or relay actuation in industrial HMI panels. IC Role / Device Role / Timing Role: Single flip-flop wired as toggle (Q̅ → D); CP driven by cleaned button signal; SD/CD unused or tied inactive. Use Value: Provides glitch-free, single-pulse-per-press behavior without firmware polling or timer-based software debouncing. |
Use Scenario: Three-state controller for stepper motor phase sequencing in open-loop motion systems. IC Role / Device Role / Timing Role: Two HEF4013BT units implement three-bit state encoding (e.g., 00→01→10→00) using combinational feedback logic. Use Value: Enables deterministic, cycle-accurate stepping without microcontroller intervention; immune to code crashes or interrupt latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4013BE | Same pinout and function but rated only to +85 °C; no Schmitt-trigger clock; lower ESD rating (HBM ~2 kV). | Limited to commercial-temperature applications; requires external clock conditioning for noisy environments. | Select when operating below +85 °C and cost is primary; avoid in automotive or industrial settings. |
| 74HC74PW,118 | Higher speed (tPD = 14 ns @ 5 V), but narrow 2–6 V VDD range; no Schmitt trigger; not rated above +125 °C. | Optimized for 3.3 V/5 V digital systems only; unsuitable for 10 V/15 V rails or extended temperature operation. | Choose for high-speed 5 V logic where thermal margin is sufficient and voltage flexibility is unnecessary. |
Compared with CD4013BE and 74HC74PW,118, the HEF4013BT,653 uniquely combines extended temperature operation (+125 °C), wide voltage support (3–15 V), and integrated Schmitt-trigger clock inputs-making it the only option suitable for ruggedized industrial timing without external components.
Availability
HEF4013BT,653 is available at Aetrix Electronics and suitable for binary counters, shift registers, toggle circuits, and state machine sequencers requiring stable component supply across harsh thermal and voltage conditions.
Supply support for HEF4013BT,653 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, serving automotive, industrial, and consumer markets with JEDEC-compliant products.
The HEF4013BT belongs to Nexperia's legacy-compatible 4000B series, designed specifically to replace aging CMOS logic in extended-temperature, multi-rail, and noise-prone applications while maintaining pin-for-pin and functional equivalence.
FAQ
Can HEF4013BT,653 operate reliably with a 12 V supply and 100 pF capacitive load?
Yes. At 12 V, the HEF4013BT,653 maintains tPHL/tPLH ≤ 35 ns (typical) and VOH ≥ 11.95 V with |IOL| ≥ 3.4 mA, fully supporting 100 pF loads per output. Derating curves confirm Ptot remains within 500 mW limit up to +125 °C with appropriate PCB copper area.
What is the minimum pulse width required on the SD or CD inputs for reliable asynchronous assertion?
The minimum pulse width (tW) for SD or CD is 10 ns at 15 V, 25 ns at 10 V, and 40 ns at 5 V, as verified in Table 7. These values ensure internal latch nodes fully settle before clock sampling, preventing metastability-induced output glitches.
Does the Schmitt-trigger action apply to all inputs or only the clock?
Schmitt-trigger action applies exclusively to the clock inputs (1CP and 2CP), as confirmed in Section 1 General Description. Data (D), set (SD), and clear (CD) inputs use standard CMOS thresholds (VIH = 11.0 V, VIL = 4.0 V at 15 V) without hysteresis.
Is the SO14 package (SOT108-1) of HEF4013BT,653 RoHS compliant and lead-free?
Yes. The HEF4013BT,653 uses a lead-free, RoHS-compliant SO14 package (SOT108-1) with matte tin plating, meeting Nexperia's standard environmental specifications per EU Directive 2011/65/EU and JEDEC J-STD-609A Class 3.
HEF4013BT,653 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 4000B
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Set(Preset) and Reset
- Type:
- D-Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 40 MHz
- Max Propagation Delay @ V, Max CL:
- 60ns @ 15V, 50pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 3.4mA, 3.4mA
- Voltage - Supply:
- 3V ~ 15V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 7.5 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
HEF4013BT,653 FAQ
1.How can I place an order for HEF4013BT,653 through Aetrix?
Please submit a Request for Quotation (RFQ) for HEF4013BT,653 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HEF4013BT,653 reliable?
The price and inventory of HEF4013BT,653 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HEF4013BT,653 is usually 5 days.
3.What payment methods are accepted for HEF4013BT,653?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HEF4013BT,653 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HEF4013BT,653?
HEF4013BT,653 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HEF4013BT,653 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HEF4013BT,653?
For technical support, including HEF4013BT,653 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HEF4013BT,653 requirements.
6.How does Aetrix verify that HEF4013BT,653 is sourced from the original manufacturer or authorized distributors?
All HEF4013BT,653 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HEF4013BT,653 meets industry standards.
7.What is the process for return or replacement of HEF4013BT,653?
All HEF4013BT,653 units undergo pre-shipment inspection (PSI). If there is an issue with HEF4013BT,653, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HEF4013BT,653 part is unused and in its original packaging.
Return procedure for HEF4013BT,653:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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