Nexperia USA Inc. HEF4013BTT,118

Overview

HEF4013BTT,118 from Nexperia is a dual D-type flip-flop with independent asynchronous set and reset inputs, positive-edge clock triggering, Schmitt-trigger clock inputs for noise immunity, and operation across 3.0 V to 15.0 V supply. It delivers symmetrical CMOS output drive (±4.2 mA at 15 V), supports industrial temperature range (−40 °C to +125 °C), and is used in synchronous logic control circuits such as binary counters and shift registers.

For engineers reviewing the HEF4013BTT,118 datasheet, HEF4013BTT,118 pinout, HEF4013BTT,118 application, or HEF4013BTT,118 equivalent, this page provides verified functional identity, validated TSSOP14 pin mapping, confirmed static/dynamic timing behavior, and real-world use cases in digital state machines and frequency division.

Technical Context

The HEF4013BTT implements two independent edge-triggered D flip-flops, each with active-HIGH asynchronous set (nSD) and clear (nCD) inputs overriding clock and data. Its Schmitt-trigger clock input ensures reliable operation with slow-rising signals (e.g., RC-generated clocks), while clamp diodes on all inputs permit interfacing to voltages exceeding VDD using current-limiting resistors.

Functionally, it operates fully statically with no minimum clock frequency requirement, supports three standard supply rails (5 V/10 V/15 V), and maintains specified performance across −40 °C to +125 °C. Propagation delays scale predictably with load capacitance (e.g., tPHL = 22 + 0.16 × CL ns at 15 V), enabling accurate timing budgeting in multi-stage logic designs.

Key Specifications

Pinout & Package

TSSOP14 plastic thin shrink small outline package (SOT402-1); 14-lead, 4.4 mm body width, 0.65 mm lead pitch; designed for high-density PCB layouts and automated surface-mount assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual D-type flip-flop applications.

Compared with CD4013BE and 74HC74PW,118, the HEF4013BTT,118 uniquely combines extended temperature range, overvoltage-tolerant inputs, and Schmitt-trigger clock robustness-making it the only choice for high-reliability, mixed-supply, noise-prone digital control in harsh environments.

Availability

HEF4013BTT,118 is available at Aetrix Electronics and suitable for binary counters, shift registers, toggle circuits, and register latches requiring stable component supply across automotive, industrial automation, and power conversion applications.

Supply support for HEF4013BTT,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components, with global R&D and manufacturing facilities focused on automotive-grade reliability.

The HEF4013B belongs to Nexperia's legacy 4000-series CMOS logic family, engineered for backward compatibility with industrial and aerospace systems requiring wide-voltage operation, high noise immunity, and long-term supply stability.

FAQ

What is the maximum clock frequency supported by HEF4013BTT,118?

The maximum clock frequency is 40 MHz at VDD = 15 V with 50 pF load, defined by the shortest propagation delay (30 ns) and setup/hold timing margins. At 5 V, fclk(max) drops to 7 MHz due to slower internal switching; actual usable frequency depends on board-level signal integrity and load capacitance.

Can HEF4013BTT,118 safely interface with 24 V sensor outputs?

Yes - its input clamp diodes allow direct connection to 24 V signals when used with a series current-limiting resistor (e.g., 10 kΩ limits IIK to <1 mA at 24 V). This avoids external voltage dividers or level shifters while maintaining logic-level compatibility at VDD = 5–15 V.

Does HEF4013BTT,118 require external pull-up or pull-down resistors on unused inputs?

No - all inputs have internal protection structures, but floating inputs are not recommended. Unused SD/CD/D inputs should be tied to VDD or VSS to prevent unintended state changes; the Schmitt-trigger clock input does not require external biasing due to its hysteresis design.

How does the Schmitt-trigger clock input improve system reliability?

The Schmitt-trigger input provides ≥1.0 V hysteresis at 5 V, rejecting noise spikes and slow-rising edges that could cause double-clocking or metastability. This allows reliable operation with RC-generated clocks, long PCB traces, or inductive environments (e.g., motor controls) without added filtering components.