Nexperia USA Inc. HEF4069UBTT,112
- Part No.:
- HEF4069UBTT,112
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
HEF4069UBTT,112.pdf
- Description:
- IC INVERTER 6CH 1-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,810
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Product details
Overview
HEF4069UBTT from Nexperia is a hex unbuffered CMOS inverter IC operating across 3.0 V to 15.0 V supply, delivering symmetrical output drive (±4.2 mA at 15 V), propagation delays as low as 15 ns (15 V, CL = 50 pF), and full static operation over -40 °C to +125 °C. It integrates input clamp diodes enabling safe interfacing to voltages exceeding VDD via current-limiting resistors, and is commonly deployed in crystal oscillator circuits and relaxation oscillators.
For engineers reviewing the HEF4069UBTT datasheet, HEF4069UBTT pinout, HEF4069UBTT application, or HEF4069UBTT equivalent, key selection considerations include its unbuffered inverter topology for analog gain and oscillator biasing, wide-voltage rail compatibility, TSSOP14 thermal derating profile (7.3 mW/K above 81 °C), and JEDEC JESD13-B compliance with HBM >2000 V and CDM >1000 V ESD robustness.
Technical Context
The HEF4069UBTT implements six independent unbuffered inverters-each consisting of a single CMOS inverter stage without internal buffering-enabling direct use as analog amplifiers when biased in the linear region (e.g., via high-value feedback resistor). Its transfer characteristics exhibit supply-dependent voltage gain (up to ~75× at 15 V) and transconductance (up to 10 mA/V), making it suitable for discrete oscillator and signal conditioning functions.
Unlike buffered logic gates, this device lacks internal level-shifting or drive enhancement stages; its output impedance and transition times scale directly with load capacitance and supply voltage per extrapolation formulas (e.g., tPHL = 7 ns + 0.16 ns/pF × CL at 15 V). Input clamp diodes allow overvoltage tolerance but require external current limiting for VI < VSS or VI > VDD + 0.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 3.0 V to 15.0 V - Supports direct interface with legacy 5 V, industrial 10 V, and high-headroom 15 V systems without level shifters. |
| Output Drive Current | ±4.2 mA at 15 V - Sufficient to drive crystal loads and moderate capacitive fan-out (e.g., 50 pF) in oscillator topologies. |
| Propagation Delay | 15 ns typical at 15 V, CL = 50 pF - Enables stable oscillation up to ~10 MHz in crystal configurations per Fig. 8. |
| Operating Temperature | -40 °C to +125 °C - Qualified for extended industrial environments including motor control and power supply timing circuits. |
| Input Clamp Diodes | Integrated - Permits safe connection to signals exceeding VDD using series current-limiting resistors (e.g., R1 in Fig. 7). |
| ESD Protection | HBM >2000 V, CDM >1000 V - Meets JEDEC JS-001 Class 2 and JS-002 Class C3 for robust handling in automated assembly. |
| Power Dissipation | 500 mW max (TSSOP14); derates 7.3 mW/K above 81 °C - Requires thermal awareness in high-density PCB layouts. |
Pinout & Package
TSSOP14 plastic thin shrink small outline package (SOT402-1); 14-lead, 4.4 mm body width, 0.65 mm pitch; optimized for space-constrained industrial PCBs with improved thermal dissipation vs. SO14.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 3, 5, 9, 11, 13 | Input (1A–6A) | CMOS digital inputs with integrated clamp diodes; require external current-limiting resistors for VI outside [VSS, VDD+0.5 V]. |
| 2, 4, 6, 8, 10, 12 | Output (1Y–6Y) | Unbuffered CMOS outputs; symmetric sourcing/sinking capability enables bidirectional signal inversion and analog amplifier biasing. |
| 7 | VSS | Ground reference (0 V); must be low-impedance connection to minimize noise coupling into sensitive oscillator nodes. |
| 14 | VDD | Primary supply rail; decoupling capacitor (e.g., 100 nF) required near pin for stable oscillator operation per Fig. 7/8. |
Key Features
| Feature | Design Value |
|---|---|
| Wide Supply Range | 3.0–15.0 V operation eliminates need for separate voltage regulators in multi-rail systems. |
| Unbuffered Inverter Topology | Enables linear-region biasing for analog oscillator core and discrete amplifier functions (Fig. 11–13). |
| Symmetrical Output Characteristics | Matched VOH/VOL and IOH/IOL ensure predictable duty cycle in relaxation oscillators (Fig. 7). |
| Input Clamp Diodes | Permits overvoltage-tolerant interfacing (e.g., to 24 V sensors) using simple series resistors instead of dedicated level translators. |
| High Noise Immunity | CMOS threshold symmetry and hysteresis-free design reduce susceptibility to supply ripple in timing-critical oscillator paths. |
Applications
| Oscillator Core | Crystal Timing Reference |
|---|---|
|
Use Scenario: Astable relaxation oscillator generating variable-frequency clock signals for sensor wake-up or LED dimming. IC Role / Device Role / Timing Role: Two unbuffered inverters configured as linear amplifiers with RC feedback to sustain oscillation; third inverter buffers output. Use Value: Frequency set by R1×C1 with minimal VDD/temperature drift (Fig. 7), enabling low-cost, self-contained timing without dedicated oscillator ICs. |
Use Scenario: Pierce crystal oscillator for microcontroller clock generation in industrial controllers. IC Role / Device Role / Timing Role: One inverter forms crystal resonator feedback path; second provides gain and level-shifting to drive LOCMOS logic. Use Value: Supports up to 10 MHz crystals (Fig. 8) with no external transistors, reducing BOM count and layout complexity. |
| Analog Signal Conditioning | Level Translation Interface |
|
Use Scenario: Low-gain analog amplifier for sensor signal offset correction before ADC sampling. IC Role / Device Role / Timing Role: Single inverter biased in linear region via 330 kΩ feedback resistor (Fig. 11) to achieve stable DC gain. Use Value: Gain adjustable from ~25× to 75× via VDD tuning (Fig. 9), eliminating need for op-amp and associated compensation components. |
Use Scenario: Interfacing 24 V industrial sensors to 5 V/10 V logic inputs in PLC I/O modules. IC Role / Device Role / Timing Role: Input clamp diodes + series resistor convert 24 V pulses to safe logic levels referenced to VDD. Use Value: Eliminates discrete diode/resistor networks and voltage dividers while maintaining JEDEC-compliant ESD robustness. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar unbuffered inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4069UBM96 | TI variant; identical pinout and electrical specs but rated only to +85 °C (not +125 °C); lower ESD rating (HBM 2000 V, CDM not specified). | Limited to commercial/indoor ambient environments; unsuitable for under-hood or high-temp industrial enclosures. | Select when cost sensitivity outweighs extended temperature or CDM robustness requirements. |
| 74HC04PW,118 | Buffered hex inverter (74HC family); faster propagation (15 ns @ 5 V) but no linear-region operation; no input clamps; VDD max = 6 V. | Cannot replace HEF4069UBTT in oscillator or analog amplifier roles; only valid for digital inversion below 6 V. | Choose only for pure digital signal inversion in 5 V systems where speed > flexibility. |
Compared with CD4069UBM96 and 74HC04PW,118, the HEF4069UBTT uniquely supports analog oscillator design, 15 V operation, and extended-temperature reliability-making it irreplaceable in crystal timing and relaxation oscillator applications requiring thermal resilience and overvoltage interface capability.
Availability
HEF4069UBTT is available at Aetrix Electronics and suitable for industrial timing circuits, sensor interface modules, and embedded oscillator designs requiring stable component supply across extended temperature ranges and diverse voltage rails.
Supply support for HEF4069UBTT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The HEF4069UBTT belongs to Nexperia's legacy CMOS logic portfolio, designed specifically for robust, wide-supply-voltage oscillator and interface applications where unbuffered inverter behavior, thermal resilience, and overvoltage tolerance are critical.
FAQ
Can HEF4069UBTT be used as an analog amplifier?
Yes-its unbuffered CMOS structure allows stable linear-region biasing. When configured with a high-value feedback resistor (e.g., 330 kΩ per Fig. 11), it delivers controllable voltage gain (25×–75×) tunable via VDD. This is validated in the datasheet's transfer characteristics (Fig. 6) and analog amplifier test setup (Fig. 11–13), confirming suitability for sensor signal conditioning without external op-amps.
What is the maximum safe input voltage for HEF4069UBTT?
The absolute maximum input voltage is VDD + 0.5 V (per Table 3). However, the integrated clamp diodes permit safe operation beyond this limit when series current-limiting resistors are used-e.g., to interface 24 V signals. The clamp diodes conduct when VI < VSS − 0.5 V or VI > VDD + 0.5 V, limiting input current to ±10 mA (Table 3), so resistor value must ensure current stays within that bound.
How does thermal derating work for the TSSOP14 package?
For the HEF4069UBTT in SOT402-1 (TSSOP14), total power dissipation (Ptot) derates linearly at 7.3 mW/K above 81 °C. At 125 °C ambient, Ptot drops to 500 mW − (125 − 81) × 7.3 ≈ 179 mW. This requires careful thermal design-e.g., copper pour under pin 7 (VSS) and pin 14 (VDD)-and limits continuous output loading in high-temp industrial enclosures.
Is HEF4069UBTT pin-compatible with other 4069 variants?
Yes-HEF4069UBTT shares identical pinout (Fig. 3) and functional diagram (Fig. 1) with all HEF4069UB variants (e.g., HEF4069UBT in SO14) and industry-standard CD4069UB devices. All use the same 14-pin arrangement: inputs on odd pins (1,3,5,9,11,13), outputs on even pins (2,4,6,8,10,12), VSS on pin 7, and VDD on pin 14-ensuring drop-in replacement across packages and manufacturers.
HEF4069UBTT,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 4000B
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 6
- Number of Inputs:
- 1
- Features:
- -
- Voltage - Supply:
- 3V ~ 15V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 3.4mA, 3.4mA
- Input Logic Level - Low:
- 1V ~ 2.5V
- Input Logic Level - High:
- 4V ~ 12.5V
- Max Propagation Delay @ V, Max CL:
- 30ns @ 15V, 50pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
HEF4069UBTT,112 FAQ
1.How can I place an order for HEF4069UBTT,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for HEF4069UBTT,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HEF4069UBTT,112 reliable?
The price and inventory of HEF4069UBTT,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HEF4069UBTT,112 is usually 5 days.
3.What payment methods are accepted for HEF4069UBTT,112?
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HEF4069UBTT,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HEF4069UBTT,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HEF4069UBTT,112?
For technical support, including HEF4069UBTT,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HEF4069UBTT,112 requirements.
6.How does Aetrix verify that HEF4069UBTT,112 is sourced from the original manufacturer or authorized distributors?
All HEF4069UBTT,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HEF4069UBTT,112 meets industry standards.
7.What is the process for return or replacement of HEF4069UBTT,112?
All HEF4069UBTT,112 units undergo pre-shipment inspection (PSI). If there is an issue with HEF4069UBTT,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HEF4069UBTT,112 part is unused and in its original packaging.
Return procedure for HEF4069UBTT,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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