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Home > Products > Integrated Circuits (ICs) > Logic > Multivibrators

NXP Semiconductors HEF4938BT,118

Name: HEF4938BT,118
Brand: NXP Semiconductors
SKU: HEF4938BT,118
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: HEF4938BT,118

Manufacturer:: NXP Semiconductors

Category:: Multivibrators

Package:: 16-SOIC (0.154", 3.90mm Width)

Datasheet:: HEF4938BT,118.pdf

Description:: IC MULTIVIBRATOR 40NS 16SO

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Product details

Overview

HEF4938BT,118 from NXP Semiconductors is a dual retriggerable-resettable monostable multivibrator in SO16 package, operating from 3 V to 15 V supply, delivering precise pulse widths (10 μs to ∞) determined by external R_EXT and C_EXT, with ±0.2 % temperature stability and Schmitt-triggered inputs tolerant of slow edges - used in timing control, debouncing, and pulse shaping circuits.

For engineers reviewing the HEF4938BT,118 datasheet, HEF4938BT,118 pinout, HEF4938BT,118 application, or HEF4938BT,118 equivalent, this device supports edge-triggered timing generation across industrial voltage rails, offers dual independent channels with active-low reset, and enables accurate one-shot pulse generation without internal RC constraints.

Technical Context

The HEF4938BT,118 implements two independent LOCMOS-based monostables, each with separate A (negative-edge) and B (positive-edge) trigger inputs, an overriding active-low direct reset (nCD), and complementary outputs (nQ/nQ). Pulse width t_W = R_EXT × C_EXT is linearly controlled via external components connected to nREXT/CEXT and nCEXT pins.

Its Schmitt-trigger input structure ensures robust operation with slow-rising/falling signals, while static CMOS design guarantees zero static current draw in stable states. The device complies with JEDEC JESD13-B and is specified from −40 °C to +85 °C ambient.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	3 V to 15 V - supports single-rail operation across 5 V, 10 V, and 15 V logic systems without level-shifting.
Pulse Width Accuracy	±0.2 % over −40 °C to +85 °C - enables high-stability timing in temperature-varying environments without recalibration.
Output Propagation Delay	60 ns to 440 ns (VDD = 5–15 V, CL = 50 pF) - defines minimum response latency for timing-critical edge detection and pulse initiation.
Input Transition Rate Tolerance	0.08 μs/V at 15 V - allows reliable triggering from slow microcontroller GPIOs or mechanical switch bounce waveforms.
External Timing Range	REXT ≥ 5 kΩ; CEXT ≥ 2000 pF - sets practical lower bounds for stable pulse generation down to ~10 μs.
Reset Recovery Time	5 ns to 40 ns (VDD = 5–15 V) - determines shortest interval between reset assertion and next valid trigger acceptance.
Package Type	SO16 (SOT109-1), 3.9 mm body width - surface-mount compatible with standard 0.050″ pitch PCB layouts and automated assembly.

Pinout & Package

HEF4938BT,118 is housed in a plastic small outline package (SO16, SOT109-1) with 16 leads and 3.9 mm body width, optimized for space-constrained industrial PCBs.

Pin	Circuit Role	Design Meaning
1, 15	nCEXT	External capacitor connection - must be tied to ground; provides reference node for timing capacitor.
2, 14	nREXT/CEXT	Timing resistor/capacitor junction - connects R_EXT and C_EXT to set output pulse width t_W = R_EXT × C_EXT.
3, 13	nCD	Direct reset input (active LOW) - immediately terminates ongoing output pulse regardless of trigger state.
4, 12	nB	Positive-edge trigger/retrigger input - initiates or extends output pulse on rising edge.
5, 11	nA	Negative-edge trigger/retrigger input - initiates or extends output pulse on falling edge.
6, 10	nQ	Non-inverted output - HIGH-level pulse with width defined by external R/C network.
7, 9	nQ	Inverted output - active-LOW complement of nQ, synchronized and matched in timing.
8	VSS	Ground supply voltage - reference node for all digital and timing circuitry.
16	VDD	Positive supply voltage - powers both monostable channels and input buffers across 3–15 V range.

Key Features

Feature	Design Value
Dual independent monostables	Enables simultaneous timing functions (e.g., delay + gate enable) without cross-talk or shared resource contention.
Retriggerable & resettable operation	Allows dynamic pulse extension during active output and immediate termination via nCD - critical for fault-safe timing sequences.
Schmitt-trigger inputs	Eliminates need for external signal conditioning when interfacing with noisy or slow-switching sources like switches or sensors.
LOCMOS linear timing architecture	Delivers predictable, voltage- and temperature-stable t_W without trimming or calibration - reduces BOM count and test overhead.
Wide supply voltage range (3–15 V)	Permits direct integration into mixed-voltage systems (e.g., 3.3 V MCU controlling 12 V actuator timing) without regulators or level shifters.

Applications

Industrial Motor Control	Automated Test Equipment
Use Scenario: Generating precise gate drive enable pulses with adjustable dead time between high-side and low-side MOSFETs in half-bridge inverters. IC Role / Device Role / Timing Role: Dual monostable provides independent, retriggerable delays for upper/lower FET control signals, with nCD enabling immediate shutdown during overcurrent events. Use Value: Achieves sub-100 ns dead-time accuracy across temperature and supply variation, preventing shoot-through without microcontroller intervention.	Use Scenario: Creating calibrated stimulus pulses and measurement windows for component parametric testing (e.g., capacitor ESR, relay contact bounce). IC Role / Device Role / Timing Role: One channel generates fixed-width test pulses; second channel creates synchronous gate window for sampling DUT response. Use Value: Eliminates FPGA or microcontroller timing firmware complexity while maintaining ±0.2 % pulse width repeatability across environmental stress.
Power Supply Sequencing	Industrial Pushbutton Debouncing
Use Scenario: Controlling power-up order of multi-rail supplies (e.g., 12 V → 5 V → 3.3 V) with programmable inter-delay intervals. IC Role / Device Role / Timing Role: Cascaded monostables generate sequential enable signals, where each nQ output triggers the next stage's nA/nB input. Use Value: Provides deterministic, component-level sequencing without software dependency or external clock sources.	Use Scenario: Converting mechanical switch closures into clean, jitter-free digital logic transitions for PLC input modules. IC Role / Device Role / Timing Role: Uses Schmitt-triggered nA/nB inputs to accept raw switch signals; nQ delivers glitch-free, 20 ms stabilized output pulse. Use Value: Replaces RC+Schmitt circuits with guaranteed 2000 pF minimum C_EXT stability and no drift over 10-year field life.

Industrial Motor Control

Automated Test Equipment

Use Scenario: Generating precise gate drive enable pulses with adjustable dead time between high-side and low-side MOSFETs in half-bridge inverters.

IC Role / Device Role / Timing Role: Dual monostable provides independent, retriggerable delays for upper/lower FET control signals, with nCD enabling immediate shutdown during overcurrent events.

Use Value: Achieves sub-100 ns dead-time accuracy across temperature and supply variation, preventing shoot-through without microcontroller intervention.

Use Scenario: Creating calibrated stimulus pulses and measurement windows for component parametric testing (e.g., capacitor ESR, relay contact bounce).

IC Role / Device Role / Timing Role: One channel generates fixed-width test pulses; second channel creates synchronous gate window for sampling DUT response.

Use Value: Eliminates FPGA or microcontroller timing firmware complexity while maintaining ±0.2 % pulse width repeatability across environmental stress.

Power Supply Sequencing

Industrial Pushbutton Debouncing

Use Scenario: Controlling power-up order of multi-rail supplies (e.g., 12 V → 5 V → 3.3 V) with programmable inter-delay intervals.

IC Role / Device Role / Timing Role: Cascaded monostables generate sequential enable signals, where each nQ output triggers the next stage's nA/nB input.

Use Value: Provides deterministic, component-level sequencing without software dependency or external clock sources.

Use Scenario: Converting mechanical switch closures into clean, jitter-free digital logic transitions for PLC input modules.

IC Role / Device Role / Timing Role: Uses Schmitt-triggered nA/nB inputs to accept raw switch signals; nQ delivers glitch-free, 20 ms stabilized output pulse.

Use Value: Replaces RC+Schmitt circuits with guaranteed 2000 pF minimum C_EXT stability and no drift over 10-year field life.

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
74HC4538D,653	CMOS version with identical SO16 pinout but narrower 2–6 V supply range and ±1 % pulse width tolerance.	Limited to low-voltage logic systems; lacks LOCMOS precision and 15 V operation.	Select when cost sensitivity outweighs timing accuracy and voltage flexibility requirements.
CD74HC221M96	Retriggerable dual monostable with 2–6 V supply, no direct reset (nCD), and typical ±2 % t_W accuracy.	Requires external logic for reset functionality; unsuitable for safety-critical immediate pulse termination.	Choose only for non-critical timing where reset independence and high-temperature stability are not required.

Compared with 74HC4538D,653 and CD74HC221M96, the HEF4938BT,118 uniquely combines 3–15 V operation, ±0.2 % thermal stability, and dedicated active-low reset per channel - making it the sole option for industrial-grade, wide-voltage, fault-responsive timing.

Availability

HEF4938BT,118 is available at Aetrix Electronics and suitable for industrial motor control, automated test equipment, power supply sequencing, and pushbutton debouncing requiring stable component supply across extended temperature and voltage ranges.

Supply support for HEF4938BT,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The HEF4938BT,118 belongs to NXP's legacy LOCMOS logic family, designed specifically for precision analog-timed digital functions in harsh industrial environments where voltage flexibility and thermal stability are critical.

FAQ

What is the minimum external timing capacitor value supported by the HEF4938BT,118?

The HEF4938BT,118 requires a minimum external timing capacitor (CEXT) of 2000 pF, as specified in Table 3 of the NXP datasheet. Using smaller values risks timing inaccuracy and instability due to internal leakage effects. This constraint applies directly to both monostable channels in the HEF4938BT,118 and is independent of supply voltage or temperature conditions.

Can the HEF4938BT,118 operate reliably at 3.3 V supply voltage?

Yes, the HEF4938BT,118 is fully specified to operate at 3 V minimum supply voltage per Table 5 (Recommended Operating Conditions), and its VIH/VIL thresholds scale accordingly - e.g., VIH ≥ 2.1 V at VDD = 3.3 V. All static and dynamic parameters, including propagation delay and pulse width accuracy, remain valid across the full 3–15 V range for the HEF4938BT,118.

Does the HEF4938BT,118 support retriggering while an output pulse is active?

Yes, the HEF4938BT,118 is explicitly retriggerable: applying a valid edge (rising on nB or falling on nA) during an active output pulse extends the pulse width by another t_W interval. This behavior is confirmed in the Functional Description section and Figure 7 waveform diagrams for the HEF4938BT,118.

What is the maximum permissible value of the external timing resistor REXT for the HEF4938BT,118?

The HEF4938BT,118 datasheet specifies a minimum REXT of 5 kΩ but does not define a hard maximum. Instead, Table 4 notes that maximum REXT depends on CEXT leakage and HEF4938BT,118 internal leakage - typically limiting practical values to ≤10 MΩ for <1 % timing error with standard ceramic capacitors. Higher values require validation per application.

Is the HEF4938BT,118 pin-compatible with the HEF4938BP (DIP16) variant?

Yes, the HEF4938BT,118 (SO16) and HEF4938BP (DIP16) share identical pin numbering, pin functions, and electrical specifications per Table 1 (Ordering Information) and Pin Description Table 2. Both variants implement the same dual monostable logic and timing architecture, allowing direct PCB footprint substitution where package height and thermal constraints permit.

HEF4938BT,118 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: 4000B

Package/Case:: 16-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Logic Type:: Monostable

Independent Circuits:: 2

Schmitt Trigger Input:: No

Propagation Delay:: 40 ns

Current - Output High, Low:: -

Voltage - Supply:: -

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SO

HEF4938BT,118 FAQ

1.How can I place an order for HEF4938BT,118 through Aetrix?

Please submit a Request for Quotation (RFQ) for HEF4938BT,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for HEF4938BT,118 reliable?

The price and inventory of HEF4938BT,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HEF4938BT,118 is usually 5 days.

3.What payment methods are accepted for HEF4938BT,118?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HEF4938BT,118 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for HEF4938BT,118?

HEF4938BT,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your HEF4938BT,118 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for HEF4938BT,118?

For technical support, including HEF4938BT,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HEF4938BT,118 requirements.

6.How does Aetrix verify that HEF4938BT,118 is sourced from the original manufacturer or authorized distributors?

All HEF4938BT,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HEF4938BT,118 meets industry standards.

7.What is the process for return or replacement of HEF4938BT,118?

All HEF4938BT,118 units undergo pre-shipment inspection (PSI). If there is an issue with HEF4938BT,118, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The HEF4938BT,118 part is unused and in its original packaging.

Return procedure for HEF4938BT,118:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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