Monolithic Power Systems Inc. HF920GS-P

Overview

HF920GS-P from Monolithic Power Systems is a monolithic 900V flyback switching regulator IC integrating a high-voltage power MOSFET (R_DS(ON) = 15 Ω @ 25°C), fixed-frequency current-mode control, and ultra-low standby power consumption (<30 mW no-load). It delivers up to 10 W output at 230 VAC in SOIC14-11 package and targets AC/DC power supplies for smart meters, industrial controls, and large appliances operating on poor or wide-range AC grids (85–420 VAC).

For engineers reviewing the HF920GS-P datasheet, HF920GS-P pinout, HF920GS-P application, or HF920GS-P equivalent, this page provides verified technical context on burst-mode operation, frequency jittering (±3.5%), OTP-integrated thermal protection, programmable switching frequency (up to 150 kHz), and PRO-pin hysteresis-based external fault handling - all critical for reliable offline SMPS design under EMI-sensitive or thermally constrained conditions.

Technical Context

The HF920GS-P implements peak-current-mode control with internal slope compensation and leading-edge blanking (t_LEB1 = 385 ns, t_LEB2 = 350 ns) to ensure stable loop dynamics and prevent false triggering during MOSFET turn-on transients. Its feedback (FB) pin governs both regulation (via K_div = 3.4–3.7) and protection thresholds (V_BURL = 0.4–0.6 V, V_BURH = 0.6–0.8 V, V_OLP = 3.3–4.0 V).

Switching frequency is resistor-programmable (f_S = 43–55 kHz typical at R_FSET = 200 kΩ) with ±3.5% jittering and optional frequency-doubling mode (enabled by 1 nF capacitor on FSET) that activates at overload to maintain regulation despite up to 50% transformer inductance drop. VCC management includes UVLO hysteresis (V_CCH = 12–14 V, V_CCL = 8.4–9.6 V) and OVP (24.4–26.5 V) with 70 μs delay.

Key Specifications

Pinout & Package

HF920GS-P is housed in a SOIC14-11 package (14-pin, 7.5 mm × 8.75 mm, 1.27 mm pitch) with exposed thermal pad on underside (not electrically connected). Pin 13 is NC; pins 1, 2, 7, and 8 are internally tied to GND.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar offline flyback regulator applications.

Compared with MP6004GQ-Z and UCC28881DR, the HF920GS-P uniquely combines 900 V rating, on-die OTP, PRO-pin configurability, and frequency doubling - making it the only option qualified for 420 VAC smart meter front-ends and industrial controllers demanding guaranteed thermal and overload resilience.

Availability

HF920GS-P is available at Aetrix Electronics and suitable for smart metering, industrial PLCs, large appliance power supplies, and building automation controllers requiring stable component supply across extended product lifecycles and global regulatory certifications.

Supply support for HF920GS-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and manufacturing partners certified to ISO 9001 and IATF 16949.

The HF920GS-P belongs to MPS's high-voltage offline regulator product line, engineered specifically for reliable, low-noise, and energy-efficient AC/DC conversion in utility-grade and industrial equipment operating on unstable or wide-range AC inputs.

FAQ

What is the maximum continuous output power achievable with HF920GS-P at 230 VAC ±15%?

The HF920GS-P delivers up to 10 W continuous output power at 230 VAC ±15% when mounted on a SOIC14-11 test board with 2.5 cm² GND copper area and operated at TA = 50°C. This rating assumes single-output configuration (VOUT = 12.5 V), BCM operation at minimum input, and proper transformer turns ratio (N = 5) to limit VDS stress. Derating is required above 50°C ambient.

How does the PRO pin function, and what external circuitry is needed for input overvoltage protection?

The PRO pin triggers immediate shutdown when voltage exceeds 2.92–3.32 V, with 0.2 V hysteresis for clean recovery. For input OVP, connect a resistive divider from the rectified AC bus to PRO, sized so that worst-case peak bus voltage (e.g., 420 VAC × √2 ≈ 600 VDC) produces ≥3.32 V at PRO. Include a 100 nF capacitor to ground for noise immunity and ensure the divider draws <100 µA to avoid loading the internal pull-down.

Can HF920GS-P operate without an auxiliary winding for VCC supply?

No - the HF920GS-P requires an auxiliary winding to sustain VCC after startup. The internal high-voltage current source on the D pin only provides initial charge until VCC reaches VCCH (12–14 V); thereafter, the auxiliary winding must supply >510 µA to maintain regulation. Without it, the IC cycles between startup and UVLO shutdown, causing erratic operation and potential thermal stress.

What is the purpose of the 1 nF capacitor on the FSET pin, and how does it affect normal operation?

The 1 nF capacitor on FSET enables frequency doubling mode: when FB voltage rises to VOLP (3.3–4.0 V), indicating overload, the IC doubles its switching frequency (e.g., from 50 kHz to 100 kHz) to maintain regulation despite reduced transformer inductance. During normal operation, the capacitor has negligible effect on f_S set by the FSET resistor alone.

Does HF920GS-P support multiple output flyback designs, and how is cross-regulation managed?

Yes - HF920GS-P supports multiple outputs via secondary windings with optocoupler feedback on the main output (FB pin). Cross-regulation relies on winding coupling quality and output capacitor ESR; for tight cross-regulation, use coupled inductors or post-regulation on auxiliary rails. The IC's current-mode control inherently improves load transient response across all outputs.

How is the burst-mode threshold calibrated, and can it be adjusted externally?

Burst-mode entry (VBURL = 0.4–0.6 V) and exit (VBURH = 0.6–0.8 V) thresholds are fixed internal comparators referenced to the FB pin - they cannot be adjusted externally. Regulation accuracy depends on optocoupler CTR and feedback resistor tolerance; for tighter burst hysteresis, select feedback resistors with ≤1% tolerance and verify with actual load-step testing.

What layout recommendations exist for minimizing EMI in HF920GS-P designs?

Minimize high-di/dt loops: place FSET resistor and CFSET capacitor close to the pin; keep S-to-GND sense resistor within 5 mm of pin 9; use short, wide traces for D, S, and GND; isolate high-voltage (D) and low-voltage (FB, PRO) sections with ground moats; and place the VCC capacitor (≥10 µF electrolytic + 100 nF ceramic) directly between pins 3 and 1/2/7/8.