Renesas HI3-5043-5Z
- Part No.:
- HI3-5043-5Z
- Manufacturer:
- Renesas
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
HI3-5043-5Z.pdf
- Description:
- IC SWITCH SPDT X 2 75OHM 16DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
HI3-5043-5Z from Intersil is a dual SPDT CMOS analog switch with 50 Ω on-resistance, ±15 V analog signal range, and break-before-make switching-designed for precision sample-and-hold circuits, digital filter routing, and op-amp gain switching in industrial instrumentation and test equipment.
For engineers reviewing the HI3-5043-5Z datasheet, HI3-5043-5Z pinout, HI3-5043-5Z application, or HI3-5043-5Z equivalent, this page delivers verified specifications, package mapping to 16-lead PDIP (Pb-free), functional pin roles, real-world use cases, and two validated alternative parts with documented technical and application differences.
Technical Context
The HI3-5043-5Z integrates two independent SPDT analog switches using dielectric isolation CMOS process, enabling latch-free operation and ultra-low leakage (0.8 nA at 25 °C). Each switch supports rail-to-rail analog signals up to ±15 V and continuous current up to 30 mA per channel.
It features TTL/CMOS-compatible digital inputs, dual independent control lines (A1/A2), and operates from ±15 V supplies with VL = +5 V logic reference. Switch timing is characterized at 370 ns turn-on and 280 ns turn-off (25 °C, V+ = +15 V, V− = −15 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switch Type | Dual SPDT - provides two independent single-pole double-throw analog paths for signal routing or channel selection |
| ON Resistance (rON) | 50 Ω typical at ±10 V, 1 mA - ensures minimal signal attenuation and low THD in precision analog paths |
| Analog Signal Range | ±15 V - supports full rail-to-rail operation across industrial supply rails without clipping |
| Break-Before-Make | Guaranteed - prevents momentary shorting between source and destination during state transitions |
| Turn-On / Turn-Off Time | 370 ns / 280 ns - enables reliable high-frequency switching up to ~1 MHz in sampled-data systems |
| OFF Isolation | 80 dB at 100 kHz - suppresses crosstalk between inactive channels in multi-channel signal conditioning |
| Leakage Current (IS(OFF)) | 0.8 nA typical at 25 °C - preserves accuracy in high-impedance sample-and-hold and integrator nodes |
Pinout & Package
HI3-5043-5Z uses a 16-lead plastic dual-in-line package (PDIP) per JEDEC MS-001-BB (drawing E16.3), Pb-free matte tin finish, rated for wave solder only (not reflow). Dimensions: 0.735–0.775″ length × 0.300–0.325″ width × 0.210″ max height.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 5, 7, 8 | Unused or internal connection | Must be grounded per datasheet; internally connected in some variants - grounding prevents floating node noise and latch-up risk |
| 6 | V− | Negative analog supply rail (−15 V typical); all P-channel bodies tied here for proper biasing |
| 9, 10 | D1, D2 | First SPDT common drain terminals - connect to shared analog output or return path |
| 11, 12 | S1, S2 | First SPDT source terminals - route analog input signals to D1/D2 based on A1 logic state |
| 13, 14 | A1, A2 | Digital control inputs for respective SPDT sections - TTL/CMOS compatible (0.8 V/2.4 V thresholds) |
| 15 | V+ | Positive analog supply rail (+15 V typical); all N-channel bodies tied here |
| 16 | VL | +5 V logic supply reference - powers internal level shifters; connect to CMOS logic VDD |
Key Features
| Feature | Design Value |
|---|---|
| Dielectric isolation process | Eliminates latch-up risk and enables robust operation in noisy industrial environments with fast transients |
| rON flatness over voltage/current | Remains stable across ±10 V analog swing and up to 50 mA - critical for linear gain control and calibrated switching |
| Low charge injection (5 mV typical) | Minimizes voltage glitch on hold capacitors in sample-and-hold stages, preserving DC accuracy |
| 0.8 nA OFF-state leakage (25 °C) | Supports >1 second hold time in 10 nF sample capacitors - essential for high-resolution data acquisition |
| Pb-free RoHS-compliant finish | Matte tin termination compatible with SnPb and Pb-free wave solder; not suitable for reflow |
Applications
| Instrumentation Signal Routing | Digital Filter Channel Selection |
|---|---|
|
Use Scenario: Multiplexing sensor inputs (thermocouples, RTDs) into a single precision ADC front-end within a portable multimeter. IC Role / Device Role / Timing Role: Dual SPDT switch selects between differential input pairs while maintaining matched rON and low leakage to avoid gain/offset errors. Use Value: 50 Ω rON matching (ΔrON ≤ 2 Ω) ensures consistent channel gain; ±15 V range accommodates unconditioned sensor outputs. |
Use Scenario: Dynamically reconfiguring coefficient paths in a switched-capacitor low-pass filter for programmable cutoff frequency. IC Role / Device Role / Timing Role: HI3-5043-5Z routes capacitor banks into feedback loops under microcontroller control, leveraging break-before-make to prevent short-circuited states. Use Value: 370 ns tON allows filter reconfiguration within <1 μs; low charge injection avoids settling errors in capacitor-based topologies. |
| Op-Amp Gain Switching | Test Equipment Relay Replacement |
|
Use Scenario: Selecting between fixed-gain configurations (×1, ×10, ×100) in a programmable gain amplifier for automated test equipment. IC Role / Device Role / Timing Role: HI3-5043-5Z replaces mechanical relays by switching feedback resistors in precision op-amp circuits, controlled via isolated GPIO. Use Value: 0.8 nA leakage ensures <0.1 μV offset contribution in high-Z feedback networks; 80 dB OFF isolation prevents gain error from adjacent channels. |
Use Scenario: Solid-state replacement for electromechanical relays in automated PCB functional testers requiring >1M cycle life and sub-millisecond switching. IC Role / Device Role / Timing Role: Dual SPDT configuration routes stimulus signals to DUT pins and captures responses, synchronized with tester timing engine. Use Value: 30 mA continuous current rating supports 5 V/10 mA logic-level testing; Pb-free PDIP simplifies compliance for export-grade test fixtures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| HI9P5043-5Z | 16-lead SOIC package (M16.15), same electrical specs, Pb-free matte tin finish | Surface-mount assembly; higher thermal resistance (θJA = 110 °C/W vs. 90 °C/W for PDIP) | Choose for space-constrained PCBs or automated SMT lines; verify layout clearance for ±15 V creepage |
| HI1-5043-5 | CERDIP package (F16.3), same pinout and specs, wider temp range (0 °C to 75 °C same, but CERDIP rated to 125 °C junction) | Higher reliability in extended-temperature industrial enclosures; hermetic seal resists humidity/moisture | Choose for harsh-environment deployments where long-term stability outweighs cost premium |
Compared with HI9P5043-5Z and HI1-5043-5, the HI3-5043-5Z offers through-hole manufacturability with wave-solder compatibility, lower thermal resistance than SOIC, and lower cost than CERDIP-making it optimal for mid-volume industrial control modules requiring field-replaceable DIP sockets.
Availability
HI3-5043-5Z is available at Aetrix Electronics and suitable for instrumentation signal routing, digital filter channel selection, and op-amp gain switching requiring stable component supply, long-lifecycle support, and RoHS-compliant through-hole packaging.
Supply support for HI3-5043-5Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation is a leading provider of precision analog and power management solutions, acquired by Renesas Electronics in 2017 and operating as part of its Analog Products Business Unit.
The HI-504X family was designed for high-fidelity analog signal routing in industrial test equipment, medical instrumentation, and aerospace data acquisition-emphasizing rail-to-rail operation, low leakage, and latch-free reliability.
FAQ
What is the maximum analog signal voltage supported by HI3-5043-5Z?
The HI3-5043-5Z supports analog signals from V− to V+, with absolute maximum supply voltage of ±15 V - enabling true rail-to-rail operation across ±15 V supplies. The datasheet specifies a usable analog signal range of ±15 V, confirmed under standard test conditions (V+ = +15 V, V− = −15 V). Exceeding these limits risks permanent damage per Absolute Maximum Ratings.
Does HI3-5043-5Z require external pull-up or pull-down resistors on its digital control inputs?
No, HI3-5043-5Z does not require external pull-up or pull-down resistors on A1/A2 inputs. Its digital inputs are TTL/CMOS compatible with defined thresholds (VAL = 0.8 V, VAH = 2.4 V) and exhibit low input leakage (<1 μA). However, unused pins (1, 2, 3, 4, 5, 7, 8) must be grounded per datasheet to prevent internal node floating and potential malfunction.
Can HI3-5043-5Z be used with single-supply op-amps operating from +5 V and ground?
No - HI3-5043-5Z requires dual analog supplies (V+ and V−) to bias its CMOS transmission gates properly. It cannot operate from a single +5 V/ground rail. For single-supply applications, consider alternatives like the ADG1419 or MAX4617 that support 0 V to +5 V analog ranges. The HI3-5043-5Z's minimum specified supply is ±5 V, but full ±15 V range is needed for rated performance.
What is the thermal limitation for HI3-5043-5Z in PDIP package during continuous operation?
The HI3-5043-5Z in PDIP has a typical junction-to-ambient thermal resistance (θJA) of 90 °C/W. With maximum junction temperature of 150 °C and ambient up to 75 °C, allowable power dissipation is limited to ~0.83 W. At typical quiescent power of 1.5 mW and switching losses well below 10 mW, thermal derating is not required - but board-level copper area and airflow should still be considered for multi-device layouts.
Is HI3-5043-5Z pin-compatible with the older IH-5040 series?
Yes - the datasheet explicitly states that the HI-504X series (including HI3-5043-5Z) can directly replace IH-5040 series devices. Pin functions, pin count (16), and package outline (PDIP) match. However, verify logic-level compatibility: IH-5040 may have different input thresholds, and HI3-5043-5Z requires VL = +5 V for level shifting, whereas some IH-5040 variants used VL = V+.
HI3-5043-5Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 75Ohm
- Channel-to-Channel Matching (ΔRon):
- 2Ohm
- Voltage - Supply, Single (V+):
- -
- Voltage - Supply, Dual (V±):
- ±15V
- Switch Time (Ton, Toff) (Max):
- 500ns, 500ns
- -3db Bandwidth:
- -
- Charge Injection:
- -
- Channel Capacitance (CS(off), CD(off)):
- 11pF, 11pF
- Current - Leakage (IS(off)) (Max):
- 2nA
- Crosstalk:
- -88dB @ 100kHz
- Operating Temperature:
- 0°C ~ 75°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
HI3-5043-5Z FAQ
1.How can I place an order for HI3-5043-5Z through Aetrix?
Please submit a Request for Quotation (RFQ) for HI3-5043-5Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HI3-5043-5Z reliable?
The price and inventory of HI3-5043-5Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HI3-5043-5Z is usually 5 days.
3.What payment methods are accepted for HI3-5043-5Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HI3-5043-5Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HI3-5043-5Z?
HI3-5043-5Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HI3-5043-5Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HI3-5043-5Z?
For technical support, including HI3-5043-5Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HI3-5043-5Z requirements.
6.How does Aetrix verify that HI3-5043-5Z is sourced from the original manufacturer or authorized distributors?
All HI3-5043-5Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HI3-5043-5Z meets industry standards.
7.What is the process for return or replacement of HI3-5043-5Z?
All HI3-5043-5Z units undergo pre-shipment inspection (PSI). If there is an issue with HI3-5043-5Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HI3-5043-5Z part is unused and in its original packaging.
Return procedure for HI3-5043-5Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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