Renesas HI9P0303-9
- Part No.:
- HI9P0303-9
- Manufacturer:
- Renesas
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
HI9P0303-9.pdf
- Description:
- IC SWITCH SPDT X 2 50OHM 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,113
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
HI9P0303-9 from Intersil is a dual SPDT CMOS analog switch fabricated using dielectric isolation technology, designed for precision signal routing in ±15V dual-supply systems. It delivers 35Ω typical on-resistance at 25°C, 40pA leakage at 25°C, and 60ns break-before-make delay - enabling low-error sample-and-hold and op amp gain switching in industrial instrumentation.
For engineers reviewing the HI9P0303-9 datasheet, HI9P0303-9 pinout, HI9P0303-9 application, or HI9P0303-9 equivalent, key selection criteria include its symmetrical switch architecture, TTL/CMOS logic compatibility (0.8V/4V thresholds), ±15V analog signal range, and SOIC-14 RoHS-compliant packaging for space-constrained PCBs.
Technical Context
The HI9P0303-9 integrates two independent SPDT analog switches with break-before-make timing to prevent signal shorting during state transitions. Each switch features matched N- and P-channel MOSFETs in a symmetrical topology, supporting bidirectional analog signal flow across the full ±15V range with minimal charge injection (30pC) and low capacitance (14–16pF off-state).
Its digital interface accepts TTL/CMOS logic levels (VINL ≤ 0.8V, VINH ≥ 4V) and drives internal level shifters to control high-voltage analog paths. Power consumption remains low (1.0mW typical) due to CMOS gate drive and dielectric isolation, enabling use in portable and battery-operated systems without thermal derating concerns.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15V - supports rail-to-rail signal switching in dual-supply industrial and test equipment |
| On Resistance (rON) | 35Ω typical at 25°C - ensures minimal gain error and voltage drop in precision op amp gain networks |
| Break-Before-Make Delay | 60ns - prevents momentary short-circuit between switch paths during state transition |
| Off Leakage Current | 40pA at 25°C - critical for low-drift sample-and-hold circuits and high-impedance sensor interfaces |
| Charge Injection | 30pC - limits voltage glitch on hold capacitors, preserving accuracy in data acquisition systems |
| Digital Input Thresholds | VINL ≤ 0.8V, VINH ≥ 4V - ensures reliable interfacing with standard TTL and CMOS logic families |
| Supply Current (I+) | 0.09mA typical - enables low-power operation in portable instrumentation and remote sensors |
Pinout & Package
HI9P0303-9 is housed in a 14-lead narrow-body SOIC package (M14.15 outline), RoHS-compliant with matte tin termination and JEDEC MS-012-AB footprint compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 14 | V+ | Positive analog supply rail (up to +15V); powers internal switch transistors and level shifters |
| 7 | GND | Digital ground reference for logic inputs and internal bias generation |
| 8 | V− | Negative analog supply rail (down to −15V); completes dual-supply operation for bipolar signals |
| 2, 4, 10, 12 | S1, S2, S3, S4 | Switch source terminals - bidirectional analog inputs/outputs connected to external circuit nodes |
| 3, 5, 11, 13 | D1, D2, D3, D4 | Switch drain terminals - complementary analog paths routed per SPDT configuration |
| 6, 9 | IN1, IN2 | Digital control inputs - TTL/CMOS-compatible logic signals that select ON/OFF state of respective switch pairs |
| NC | No Connect | Pin 1 is unconnected; must be left floating or tied to GND per layout best practices |
Key Features
| Feature | Design Value |
|---|---|
| Symmetrical Switch Elements | Identical N- and P-channel FETs per path enable true bidirectional signal routing with matched on-resistance and capacitance |
| Break-Before-Make Timing | Guaranteed 60ns minimum dead time prevents cross-conduction in multiplexed signal chains |
| Low Charge Injection (30pC) | Minimizes hold capacitor voltage step error in sample-and-hold amplifiers, improving DC accuracy |
| Dielectric Isolation Process | Eliminates latch-up risk and enables robust operation in noisy industrial environments with high EMI |
| Pb-Free (RoHS) SOIC Packaging | M14.15 outline supports automated assembly and reflow compatibility with SnPb and Pb-free solder processes |
Applications
| Sample-and-Hold Circuits | Op Amp Gain Switching |
|---|---|
|
Use Scenario: Precision data acquisition systems requiring low-drift analog sampling before ADC conversion. IC Role / Device Role / Timing Role: Low-leakage analog switch controlling connection between input signal and hold capacitor. Use Value: 40pA max off-leakage at 25°C preserves capacitor voltage integrity over sampling intervals, reducing acquisition error. |
Use Scenario: Programmable-gain instrumentation amplifiers where feedback resistor networks are dynamically selected. IC Role / Device Role / Timing Role: Dual SPDT switch routing between multiple feedback resistors to set amplifier gain. Use Value: 35Ω typical on-resistance minimizes gain error and thermal drift compared to mechanical relays or higher-RON alternatives. |
| Portable Battery-Powered Instruments | Dual-Supply Signal Routing |
|
Use Scenario: Handheld multimeters, portable oscilloscopes, and field-deployable sensors operating from limited battery capacity. IC Role / Device Role / Timing Role: Low-power analog switch enabling signal path selection without significant quiescent current draw. Use Value: 1.0mW typical operating power extends battery life while maintaining ±15V signal handling capability. |
Use Scenario: Industrial PLC I/O modules and test equipment requiring bipolar analog signal conditioning. IC Role / Device Role / Timing Role: Bidirectional switch supporting ±15V signal routing between sensors, DACs, and op amps. Use Value: Full ±15V analog range and symmetrical switch structure ensure distortion-free signal transmission in dual-rail systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG1434BRUZ | Higher on-resistance (1.3Ω typical), wider supply range (±15V to ±22V), but no break-before-make guarantee | Better suited for high-voltage fault-tolerant systems; less optimal for precision sample-and-hold due to higher RON and leakage | Select ADG1434BRUZ only when absolute maximum supply voltage >44V is required and break-before-make is not critical |
| MAX4634EUB+ | Lower leakage (0.5pA typ), smaller 10-pin µMAX package, but limited to ±5.5V supplies | Ideal for low-voltage portable designs; incompatible with ±15V industrial signal chains | Choose MAX4634EUB+ for battery-powered devices with <±6V rails and ultra-low leakage requirements |
Compared with HI9P0303-9, ADG1434BRUZ offers extended voltage tolerance but sacrifices guaranteed break-before-make timing and adds 37× higher on-resistance, while MAX4634EUB+ achieves sub-picoamp leakage at the cost of halving the usable analog signal range - making HI9P0303-9 the balanced choice for ±15V precision switching with deterministic timing.
Availability
HI9P0303-9 is available at Aetrix Electronics and suitable for industrial instrumentation, test and measurement equipment, and portable data acquisition systems requiring stable component supply across extended temperature ranges (−40°C to +85°C).
Supply support for HI9P0303-9 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation is a precision analog and power management IC specialist, now part of Renesas Electronics, with deep expertise in high-reliability industrial and aerospace-grade components.
The HI-303 family was engineered specifically for high-fidelity analog signal routing in demanding dual-supply environments - emphasizing low leakage, matched switch characteristics, and robust isolation for mission-critical instrumentation.
FAQ
What is the operating temperature range for HI9P0303-9?
The HI9P0303-9 is rated for operation from −40°C to +85°C, matching the "-9" suffix designation in the ordering code. This range is validated per the Absolute Maximum Ratings table and Electrical Specifications section of the FN3125 datasheet, and applies specifically to the SOIC-packaged HI9P0303-9Z variant.
Does HI9P0303-9 support single-supply operation?
Yes, HI9P0303-9 can operate from a single +30V supply with V− tied to ground, or asymmetric supplies such as +15V/0V, provided the total voltage difference between V+ and V− does not exceed 44V. The analog signal range remains centered around the V− rail, so proper biasing is required for AC-coupled signals.
Is HI9P0303-9 pin-compatible with other HI-303 variants like HI1-0303-2?
No - while all HI-303 variants share identical pin functions and electrical behavior, HI9P0303-9 uses a 14-lead SOIC package (M14.15), whereas HI1-0303-2 uses a 14-lead CERDIP (F14.3) and HI3-0303-5Z uses a 14-lead PDIP (E14.3). Footprints and thermal profiles differ significantly; PCB layout changes are required for substitution.
What is the maximum analog input voltage allowed on HI9P0303-9?
The absolute maximum analog input voltage on any S or D pin is (V+) +1.5V to (V−) −1.5V, per the Absolute Maximum Ratings table. For ±15V supplies, this defines a safe analog range of −16.5V to +16.5V - though the specified functional range remains ±15V to ensure linearity and low on-resistance performance.
How does the break-before-make timing work in HI9P0303-9?
HI9P0303-9 guarantees a minimum 60ns interval between turn-off of one switch path and turn-on of the alternate path within each SPDT pair. This is implemented via internal delay circuitry in the switch driver stage and is verified under all temperature and supply conditions - preventing transient short-circuits in multiplexed signal paths.
HI9P0303-9 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Packaging:
- Bag
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 50Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- 5V ~ 34V
- Voltage - Supply, Dual (V±):
- ±5V ~ 20V
- Switch Time (Ton, Toff) (Max):
- 300ns, 250ns
- -3db Bandwidth:
- -
- Charge Injection:
- 30pC
- Channel Capacitance (CS(off), CD(off)):
- 16pF, 14pF
- Current - Leakage (IS(off)) (Max):
- 5nA
- Crosstalk:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
HI9P0303-9 FAQ
1.How can I place an order for HI9P0303-9 through Aetrix?
Please submit a Request for Quotation (RFQ) for HI9P0303-9 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HI9P0303-9 reliable?
The price and inventory of HI9P0303-9 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HI9P0303-9 is usually 5 days.
3.What payment methods are accepted for HI9P0303-9?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HI9P0303-9 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HI9P0303-9?
HI9P0303-9 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HI9P0303-9 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HI9P0303-9?
For technical support, including HI9P0303-9 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HI9P0303-9 requirements.
6.How does Aetrix verify that HI9P0303-9 is sourced from the original manufacturer or authorized distributors?
All HI9P0303-9 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HI9P0303-9 meets industry standards.
7.What is the process for return or replacement of HI9P0303-9?
All HI9P0303-9 units undergo pre-shipment inspection (PSI). If there is an issue with HI9P0303-9, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HI9P0303-9 part is unused and in its original packaging.
Return procedure for HI9P0303-9:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
HI9P0303-9 Tags

-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments

-
SN74LVC1G3157DSFR
Texas Instruments

-
1P1G3157QDCKRQ1
Texas Instruments

-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments

-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

