Renesas HIP6004BCBZ-T
- Part No.:
- HIP6004BCBZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
HIP6004BCBZ-T.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 20SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
HIP6004BCBZ-T from Intersil is a synchronous-rectified buck PWM controller IC designed to drive two N-channel MOSFETs in high-performance microprocessor power supplies. It delivers precise voltage-mode control, 0%–100% duty cycle range, ±1% output regulation over line/temperature, and integrated VID-based DAC output voltage selection from 1.3V to 3.5V. It is used in Pentium® and PowerPC™ CPU core voltage regulation.
For engineers reviewing the HIP6004BCBZ-T datasheet, HIP6004BCBZ-T pinout, HIP6004BCBZ-T application, or HIP6004BCBZ-T equivalent, key selection considerations include its 20-pin SOIC package, 200kHz programmable oscillator (50kHz–1MHz), rDS(ON)-based overcurrent sensing, TTL-compatible 5-bit VID interface, and integrated PGOOD monitoring with ±10% window.
Technical Context
The HIP6004BCBZ-T implements voltage-mode PWM control using a 15MHz gain-bandwidth error amplifier and 6V/µs slew rate for fast transient response. Its oscillator frequency is set via external RT resistor-pull-down to GND increases frequency, pull-up to VCC decreases it-with typical 200kHz free-running operation.
Overcurrent protection uses the upper MOSFET's rDS(ON) and an internal 200µA current source at OCSET to avoid sense resistors. Output voltage is programmed by VID0–VID4 pins driving a 5-bit DAC; DACOUT sets both regulation target and PGOOD/OVP thresholds per Table 1, with binary steps of 0.05V (1.3–2.05V) and 0.1V (2.1–3.5V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Voltage Mode Control | Single-loop architecture with 15MHz GBW error amplifier enables high-bandwidth feedback for sub-10µs load transient recovery. |
| Output Voltage Range | 1.3V–3.5V in discrete steps: 0.05V increments up to 2.05V, then 0.1V increments-supports Intel Pentium Pro and AMD K6™ VID protocols. |
| Oscillator Frequency | 200kHz nominal, adjustable from <50kHz to >1MHz via RT resistor-enables optimization of efficiency vs. size in DC-DC designs. |
| Regulation Accuracy | ±1% over line voltage and temperature-ensures stable core voltage under varying input and thermal conditions. |
| PGOOD Window | ±10% tracking of DACOUT reference with 2% hysteresis-prevents false toggling during normal output ripple. |
| Gate Drive Capability | UGATE: 350–500mA source / 5.5–10Ω sink; LGATE: 300–450mA source / 3.5–6.5Ω sink-directly drives medium-power N-MOSFETs without buffers. |
| Overcurrent Sensing | rDS(ON)-based, no external sense resistor required-reduces BOM count and conduction losses in high-current CPU rails. |
Pinout & Package
Package: 20-lead SOIC (M20.3), Pb-free, RoHS-compliant, 0°C to +70°C operating range.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSEN (1) | Output voltage sense input | Connects directly to converter output to feed PGOOD comparator and OVP circuit-enables accurate ±10% monitoring relative to DACOUT. |
| OCSET (2) | Overcurrent threshold programming | Internal 200µA current source flows through ROCSET to VIN; combined with rDS(ON) sets IPEAK trip point per IPEAK = (IOCSET × ROCSET)/rDS(ON). |
| SS (3) | Soft-start timing node | 10µA internal current charges external CSS capacitor to 4V-controls ramp-up time and prevents inrush current during startup. |
| VID0–VID4 (4–8) | Digital voltage identification inputs | TTL-compatible 5-bit bus selects DACOUT level; '11111' disables gate drivers and forces PGOOD high for dual-CPU AND-ing logic. |
| COMP (9) | Error amplifier output | Drives compensation network; connects to FB via external RC components to stabilize voltage-mode loop with 0dB crossing >100kHz. |
| FB (10) | Error amplifier inverting input | Connected to VSEN via resistor divider-completes feedback path for regulation; referenced to DACOUT internal reference. |
| GND (11) | Signal ground reference | Reference point for all analog and digital signals; must be low-impedance connection to minimize noise coupling into sensitive nodes. |
| PGOOD (12) | Open-drain power-good indicator | Pulled low when VSEN deviates >±10% from DACOUT; asserts high for VID='11111'-used for system power sequencing and fault signaling. |
| PHASE (13) | High-side switch node monitor | Connects to source of upper MOSFET-provides return path for UGATE drive and enables rDS(ON)-based current sensing. |
| UGATE (14) | Upper MOSFET gate driver output | Provides 500mA peak source/sink capability; requires bootstrap capacitor (CBOOT) between BOOT and PHASE for high-side N-MOSFET operation. |
| BOOT (15) | Bootstrap supply for UGATE | Charged via external diode/capacitor from PHASE-generates floating bias above PHASE to fully enhance N-channel high-side FET. |
| PGND (16) | Power ground return | Low-inductance return path for lower MOSFET source and high-current switching paths-must be tied to PCB ground plane near Q2. |
| LGATE (17) | Lower MOSFET gate driver output | 450mA peak source drives synchronous rectifier; sinks current through internal 3.5–6.5Ω path-eliminates need for external low-side driver. |
| VCC (18) | Bias supply input | Accepts +12V ±10% (or +5V); powers internal circuitry and gate drivers-requires local 10µF ceramic decoupling to PGND. |
| OVP (19) | Overvoltage crowbar trigger | Open-drain output sourcing 60mA when VSEN exceeds 115–120% DACOUT-drives external SCR to short input rail during catastrophic overvoltage. |
| RT (20) | Oscillator frequency programming | Resistor to GND sets fSW ≈ 200kHz + 5×10⁶/RT(kΩ); resistor to VCC sets fSW ≈ 200kHz – 4×10⁷/RT(kΩ)-enables precise EMI tuning. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 5-bit VID DAC | Eliminates external DAC IC; supports 32 discrete output voltages from 1.3V to 3.5V with binary step resolution matched to legacy x86 CPU requirements. |
| rDS(ON)-based current sensing | Removes need for power-wasting, board-space-consuming current-sense resistor-improves efficiency and simplifies layout in high-current CPU VRMs. |
| Programmable 200kHz oscillator | Adjustable frequency range (50kHz–1MHz) allows trade-off between magnetic component size, switching loss, and EMI compliance across diverse board-level constraints. |
| Full 0%–100% duty cycle support | Enables deep dropout operation down to ~1.3V from 5V or 12V input-critical for low-voltage, high-current microprocessor core rails. |
| Integrated PGOOD with hysteresis | 2% hysteresis prevents chatter during normal ripple; ±10% window ensures reliable power sequencing in multi-rail systems before processor release. |
Applications
| Microprocessor Core Supply | High-Power 5V-to-3.xV Regulator |
|---|---|
Use Scenario: Delivering tightly regulated 1.8V/25A core voltage to Intel Pentium Pro with <100ns load transients. IC Role / Device Role / Timing Role: Primary PWM controller managing synchronous buck topology, VID decoding, and real-time overcurrent protection. Use Value: ±1% regulation and 15MHz error amplifier bandwidth maintain voltage within spec during 1A/ns di/dt events-preventing CPU reset or data corruption. | Use Scenario: Converting +5V bus to 3.3V/15A for FPGA I/O banks requiring low-noise, fast-response supply. IC Role / Device Role / Timing Role: Voltage-mode controller with programmable 200kHz oscillator and integrated gate drivers for compact, efficient single-stage conversion. Use Value: 0%–100% duty cycle and rDS(ON) sensing enable high efficiency (>90%) without external current sensors-reducing thermal stress and BOM cost. |
| Low-Voltage Distributed Power | Legacy x86 CPU VRM |
Use Scenario: Local 2.5V/12A supply on a telecom blade where space and thermal density are constrained. IC Role / Device Role / Timing Role: Compact SOIC-packaged controller providing full protection (OVP, OC, PGOOD) and soft-start in minimal footprint. Use Value: QFN/SOIC package compatibility and Pb-free RoHS compliance simplify manufacturing and meet IPC-J-STD-020C reflow requirements. | Use Scenario: Replacement VRM controller for AMD K6™-based industrial PC requiring VID0–VID4 compatibility and 1.5–2.5V output. IC Role / Device Role / Timing Role: Drop-in compatible controller supporting same VID table and DACOUT-to-PGOOD mapping as original design. Use Value: Identical pinout and VID logic (including '11111' disable mode) ensure zero firmware or hardware changes during repair or upgrade. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| HIP6006CBZ-T | Same family, adds adaptive voltage positioning (AVP) and enhanced thermal shutdown; 20-pin SOIC, identical pinout. | Supports dynamic voltage scaling for mobile CPUs; not required for fixed-VID desktop applications. | Select HIP6006CBZ-T only if AVP or tighter thermal protection is needed-otherwise HIP6004BCBZ-T remains optimal for cost-sensitive, fixed-output designs. |
| ISL6225CRZ-T | Intersil successor with integrated MOSFET drivers, 300kHz base frequency, and improved light-load efficiency; 20-pin QFN only. | Requires PCB redesign due to QFN-only packaging and different pin assignments (e.g., no dedicated OCSET pin). | Choose ISL6225CRZ-T for new designs targeting higher efficiency and smaller footprint-but not as a drop-in replacement for HIP6004BCBZ-T in existing SOIC layouts. |
Compared with HIP6004BCBZ-T, HIP6006CBZ-T offers identical pinout and VID compatibility with added AVP functionality, while ISL6225CRZ-T provides higher integration and efficiency but mandates QFN layout and lacks rDS(ON) current sensing-making HIP6004BCBZ-T uniquely suited for legacy SOIC-based CPU VRMs requiring proven, resistor-programmable control.
Availability
HIP6004BCBZ-T is available at Aetrix Electronics and suitable for microprocessor core supplies, high-power 5V-to-3.xV DC-DC regulators, and low-voltage distributed power systems requiring stable component supply and long-term obsolescence management.
Supply support for HIP6004BCBZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation was a U.S.-based semiconductor company specializing in power management, precision analog, and interface ICs, later acquired by Renesas Electronics in 2017.
The HIP6004B product line was engineered specifically for high-current, low-voltage CPU core power delivery in late-1990s/early-2000s x86 and RISC microprocessors, emphasizing VID compatibility, rDS(ON) sensing, and robust transient response.
FAQ
What is the recommended input voltage range for HIP6004BCBZ-T?
The HIP6004BCBZ-T operates with a VCC supply of +12V ±10% (10.8V to 13.2V) or +5V. The datasheet specifies +12V as nominal, with absolute maximum VCC at +15V. Input voltage tolerance and thermal derating must be observed to maintain ±1% regulation and avoid exceeding 150°C junction temperature.
Does HIP6004BCBZ-T support 0% to 100% duty cycle operation?
Yes, HIP6004BCBZ-T supports full 0% to 100% PWM duty cycle. This enables operation down to ~1.3V output from a 5V input and accommodates wide input/output ratios common in microprocessor core supplies. The error amplifier and comparator architecture allow seamless transition across the entire range without dead zones or discontinuities.
How does HIP6004BCBZ-T implement overcurrent protection without a sense resistor?
HIP6004BCBZ-T uses the upper MOSFET's rDS(ON) as the current-sensing element. An internal 200µA current source at OCSET develops a voltage across an external ROCSET resistor; when the voltage drop across the MOSFET (VPHASE–VSEN) exceeds that across ROCSET, overcurrent is triggered. This eliminates power loss and board area associated with discrete sense resistors.
What is the function of the '11111' VID code on HIP6004BCBZ-T?
When VID0–VID4 are all high ('11111'), HIP6004BCBZ-T disables both UGATE and LGATE outputs and forces PGOOD high-regardless of actual output voltage. This behavior supports dual-CPU systems where PGOOD signals are AND-ed; one controller can hold the system in reset while the other powers up, ensuring synchronized sequencing.
Can HIP6004BCBZ-T be used with a 500kHz switching frequency?
Yes, HIP6004BCBZ-T supports 500kHz operation. With RT pulled down to GND, fSW ≈ 200kHz + 5×10⁶/RT(kΩ). Solving for RT gives ~16.7kΩ. Layout must minimize parasitic inductance, and gate drivers must handle increased switching losses-verified via thermal testing under full load at 500kHz.
HIP6004BCBZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel Pentium®, II, Pro
- Voltage - Input:
- 5V, 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 1.3V ~ 3.5V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SOIC
HIP6004BCBZ-T FAQ
1.How can I place an order for HIP6004BCBZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for HIP6004BCBZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HIP6004BCBZ-T reliable?
The price and inventory of HIP6004BCBZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HIP6004BCBZ-T is usually 5 days.
3.What payment methods are accepted for HIP6004BCBZ-T?
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4.How is shipping managed for HIP6004BCBZ-T?
HIP6004BCBZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HIP6004BCBZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HIP6004BCBZ-T?
For technical support, including HIP6004BCBZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HIP6004BCBZ-T requirements.
6.How does Aetrix verify that HIP6004BCBZ-T is sourced from the original manufacturer or authorized distributors?
All HIP6004BCBZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HIP6004BCBZ-T meets industry standards.
7.What is the process for return or replacement of HIP6004BCBZ-T?
All HIP6004BCBZ-T units undergo pre-shipment inspection (PSI). If there is an issue with HIP6004BCBZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HIP6004BCBZ-T part is unused and in its original packaging.
Return procedure for HIP6004BCBZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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