Renesas HIP6004BCV-T
- Part No.:
- HIP6004BCV-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
HIP6004BCV-T.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,938
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
HIP6004BCV-T from Intersil is a synchronous-rectified buck PWM controller IC designed to drive two N-channel MOSFETs in high-performance microprocessor power supplies. It delivers precise output voltage regulation (±1% over line/temperature), supports 1.3V–3.5V DAC-programmed outputs in 0.05V/0.1V steps, features a 200kHz free-running oscillator adjustable from 50kHz to >1MHz, and integrates overvoltage/overcurrent protection using MOSFET rDS(ON) sensing - deployed in Pentium Pro, PowerPC, and K6-based DC-DC regulators.
For engineers reviewing the HIP6004BCV-T datasheet, HIP6004BCV-T pinout, HIP6004BCV-T application, or HIP6004BCV-T equivalent, key selection considerations include its voltage-mode control architecture, TTL-compatible 5-bit VID interface, integrated PGOOD monitoring with ±10% window, gate driver sourcing/sinking capability (500mA/450mA), and TSSOP-20 package thermal performance (θJA = 85°C/W).
Technical Context
The HIP6004BCV-T implements voltage-mode PWM control with a 15MHz gain-bandwidth error amplifier and 6V/µs slew rate, enabling fast transient response in microprocessor VRMs. Its oscillator uses an external RT resistor to set switching frequency across a 50kHz–1MHz range, while the internal 200µA OCSET current source enables MOSFET rDS(ON)-based overcurrent detection without a sense resistor.
It integrates a 5-bit TTL-compatible DAC (VID0–VID4) that sets both output voltage (1.3V–3.5V) and associated protection thresholds (PGOOD, OVP). The PGOOD signal asserts low when VSEN deviates >±10% from DACOUT, with 2% hysteresis to prevent ripple-induced toggling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Control Topology | Voltage-mode PWM for synchronous buck converters - enables single-loop stability with predictable compensation design. |
| Output Voltage Range | 1.3V–3.5V programmable via 5-bit VID inputs - supports legacy microprocessor core voltages with 0.05V steps below 2.05V and 0.1V above. |
| Reference Accuracy | ±1% over temperature and line - ensures tight regulation without external trimming in production systems. |
| Switching Frequency | 200kHz nominal, adjustable 50kHz–1MHz via RT resistor - balances efficiency, size, and EMI in space-constrained CPU power stages. |
| Error Amplifier GBW | 15MHz gain-bandwidth product - supports high-loop bandwidth for sub-microsecond load transient recovery. |
| Gate Drive Capability | UGATE: 500mA source / 5.5Ω sink; LGATE: 450mA source / 3.5Ω sink - directly drives medium-size N-MOSFETs without external buffers. |
| Overcurrent Sensing | rDS(ON)-based, no external sense resistor required - reduces BOM cost and PCB area while maintaining accuracy within MOSFET variation limits. |
Pinout & Package
The HIP6004BCV-T is housed in a 20-lead TSSOP package (JEDEC MO-220 compliant), optimized for thermal dissipation (θJA = 85°C/W) and board space efficiency in high-density CPU VRM layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSEN (1) | Output voltage feedback input | Connects to converter output to enable PGOOD assertion and OVP monitoring relative to DACOUT reference. |
| OCSET (2) | Overcurrent threshold programming | External resistor sets trip point using internal 200µA current source and upper MOSFET rDS(ON). |
| SS (3) | Soft-start timing node | 10µA internal current charges external capacitor to control ramp-up time and prevent inrush current. |
| VID0–VID4 (4–8) | Digital voltage identification inputs | TTL-compatible 5-bit bus selects DACOUT voltage level - determines output, PGOOD, and OVP thresholds. |
| COMP (9) | Error amplifier output | Drives external compensation network; connects to feedback loop compensation components. |
| FB (10) | Error amplifier inverting input | Connects to VSEN through resistive divider to close voltage regulation loop. |
| GND (11) | Signal ground reference | Reference point for all analog and digital logic levels; must be low-impedance connection to system ground plane. |
| PGOOD (12) | Power-good status output | Open-drain output pulled low when VSEN is outside ±10% of DACOUT - used for system power sequencing. |
| PHASE (13) | High-side switch source monitor | Connects to upper MOSFET source; provides return path for UGATE drive and enables rDS(ON) current sensing. |
| UGATE (14) | Upper MOSFET gate driver output | Drives gate of high-side N-MOSFET; requires bootstrap circuitry for full enhancement. |
| BOOT (15) | Bootstrap supply input | Provides floating bias for UGATE driver; typically connected to PHASE via bootstrap diode/capacitor. |
| PGND (16) | Power ground return | Low-impedance return path for lower MOSFET source and power-stage currents - separate from signal GND. |
| LGATE (17) | Lower MOSFET gate driver output | Drives gate of synchronous rectifier (low-side N-MOSFET); referenced to PGND. |
| VCC (18) | Bias supply input | Accepts +12V ±10% input; powers internal circuitry and gate drivers - decoupling capacitor required. |
| OVP (19) | Overvoltage protection output | Active-high output triggers external SCR crowbar during >115% DACOUT overvoltage - disables PWM immediately. |
| RT (20) | Oscillator frequency programming | Resistor to GND increases frequency; resistor to VCC decreases frequency - enables precise switching frequency tuning. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 5-bit TTL DAC | Enables discrete 1.3V–3.5V output programming without external DAC or DAC interface logic - simplifies VID configuration in legacy CPU platforms. |
| Voltage-mode control loop | Single-feedback architecture with 15MHz error amplifier - reduces compensation complexity versus current-mode designs while supporting fast transient response. |
| rDS(ON)-based overcurrent protection | Eliminates need for dedicated current-sense resistor - lowers component count, improves efficiency, and avoids parasitic inductance issues in high-di/dt paths. |
| Programmable 50kHz–1MHz oscillator | RT-resistor tuning allows optimization of magnetic component size, conduction losses, and EMI filtering requirements per application. |
| Power-good monitoring with hysteresis | ±10% window with 2% hysteresis prevents false PGOOD toggling due to output ripple - ensures reliable system power sequencing. |
Applications
| Pentium Pro CPU Core Supply | PowerPC™ Processor VRM |
|---|---|
Use Scenario: Provides tightly regulated 1.8V–2.5V core voltage to Intel Pentium Pro microprocessors under dynamic load conditions up to 30A. IC Role / Device Role / Timing Role: Primary PWM controller managing synchronous buck stage, VID decoding, and real-time overvoltage/overcurrent fault response. Use Value: Enables ±1% output regulation and <10µs transient recovery using integrated high-bandwidth error amplifier and MOSFET rDS(ON) current sensing. | Use Scenario: Delivers scalable 2.0V–2.8V core power to PowerPC 603/604 processors in embedded telecom and industrial control systems. IC Role / Device Role / Timing Role: Central voltage-mode controller coordinating dual-phase operation (with companion IC), soft-start sequencing, and PGOOD signaling to host controller. Use Value: Supports stable operation across 0°C–70°C ambient with no external current sense resistor, reducing BOM cost and layout sensitivity. |
| K6™ Microprocessor Power Stage | Low-Voltage Distributed Power Supply |
Use Scenario: Generates 2.2V–3.3V core voltage for AMD K6 family CPUs in desktop motherboards with multi-rail power delivery. IC Role / Device Role / Timing Role: Synchronous buck controller implementing VID-based voltage scaling, overvoltage crowbar via OVP pin, and hiccup-mode overcurrent protection. Use Value: Achieves <50mV output deviation during 10A load steps using 0.1V DAC resolution and 6V/µs error amplifier slew rate. | Use Scenario: Supplies 1.5V–3.5V intermediate bus power to FPGAs, ASICs, and memory subsystems in modular server backplanes. IC Role / Device Role / Timing Role: Standalone buck controller providing digitally programmable output with PGOOD handshake for hot-swap and redundancy management. Use Value: Allows field-upgradable voltage settings via VID strap options without firmware changes - critical for multi-platform hardware reuse. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| HIP6006BCB-T | Same architecture but SOIC-20 package; θJA = 65°C/W vs. TSSOP's 85°C/W; identical VID range and protection features. | Preferred for lower-power or thermally relaxed layouts where larger footprint is acceptable. | Select HIP6006BCB-T only if board-level thermal resistance permits higher junction temperature rise at same power dissipation. |
| ISL6522CBZ-T | Successor generation with enhanced transient response (20MHz GBW), wider VID range (0.9V–5.5V), and integrated MOSFET drivers with higher peak current (1.2A). | Required for newer Pentium 4 and Athlon XP platforms demanding faster load step response and lower output voltages. | Choose ISL6522CBZ-T for new designs targeting <1V core rails or >50A loads; HIP6004BCV-T remains valid for legacy 1.3V–3.5V systems. |
Compared with HIP6006BCB-T, the HIP6004BCV-T offers superior board-area efficiency in TSSOP packaging but trades off ~20°C/W higher thermal resistance; versus ISL6522CBZ-T, it lacks sub-1V support and advanced transient handling but maintains full compatibility with existing Pentium Pro/K6 VID tables and layout footprints.
Availability
HIP6004BCV-T is available at Aetrix Electronics and suitable for Pentium Pro motherboard power supplies, PowerPC-based industrial controllers, and K6™-equipped desktop platforms requiring stable component supply and long-term obsolescence management.
Supply support for HIP6004BCV-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation (now part of Renesas Electronics) is a semiconductor manufacturer specializing in precision analog, power management, and interface ICs for computing, industrial, and communications markets.
The HIP6004B product line was engineered specifically for high-current, low-voltage VRMs in x86 and RISC microprocessor systems - emphasizing VID compatibility, MOSFET rDS(ON) current sensing, and robust protection for mission-critical CPU power delivery.
FAQ
What is the maximum supported switching frequency for the HIP6004BCV-T?
The HIP6004BCV-T supports a switching frequency range from 50kHz to over 1MHz, set by an external RT resistor. With RT connected to GND, frequency increases according to Fs ≈ 200kHz + 5×10⁶/RT(kΩ); with RT pulled up to VCC, it decreases per Fs ≈ 200kHz – 4×10⁷/RT(kΩ). The HIP6004BCV-T achieves stable operation at 1MHz in validated reference designs with appropriate gate drive and layout.
Does the HIP6004BCV-T require an external current-sense resistor for overcurrent protection?
No, the HIP6004BCV-T does not require an external current-sense resistor. It implements overcurrent protection using the upper MOSFET's rDS(ON) as the sensing element, combined with an internal 200µA current source on the OCSET pin and an external ROCSET resistor. This method eliminates added component cost and PCB area while maintaining accurate trip-point calibration per the equation IPEAK = (IOCSET × ROCSET)/rDS(ON).
What VID voltage levels does the HIP6004BCV-T support, and how are they selected?
The HIP6004BCV-T supports 32 discrete output voltage levels from 1.30V to 3.50V, selected via TTL-compatible logic states on VID0–VID4 pins (pins 4–8). Levels from 1.30V to 2.05V are spaced at 0.05V increments; from 2.10V to 3.50V at 0.10V increments. Each combination corresponds to a specific DACOUT voltage listed in Table 1 of the HIP6004BCV-T datasheet, which directly sets the regulated output and protection thresholds.
How does the HIP6004BCV-T generate the PGOOD signal, and what is its accuracy?
The HIP6004BCV-T generates the PGOOD signal using an internal window comparator that monitors VSEN against DACOUT. PGOOD asserts low when VSEN falls outside ±10% of DACOUT, with 2% hysteresis to prevent oscillation due to output ripple. The comparator reference tracks DACOUT directly, ensuring PGOOD accuracy remains tied to the ±1% voltage regulation tolerance of the HIP6004BCV-T's reference circuitry.
Can the HIP6004BCV-T operate with a +5V input supply instead of +12V?
Yes, the HIP6004BCV-T operates from either +5V or +12V input as specified in the Absolute Maximum Ratings and Operating Conditions. When using +5V, VCC must be supplied at 5V ±10%, and the gate drive capability (UGATE/LGATE sourcing/sinking) remains functional, though bootstrapping may require adjustment to ensure sufficient VBOOT–VPHASE margin for upper MOSFET enhancement. The HIP6004BCV-T's internal circuits are fully characterized across both supply ranges.
HIP6004BCV-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel Pentium®, II, Pro
- Voltage - Input:
- 5V, 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 1.3V ~ 3.5V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP
HIP6004BCV-T FAQ
1.How can I place an order for HIP6004BCV-T through Aetrix?
Please submit a Request for Quotation (RFQ) for HIP6004BCV-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HIP6004BCV-T reliable?
The price and inventory of HIP6004BCV-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HIP6004BCV-T is usually 5 days.
3.What payment methods are accepted for HIP6004BCV-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HIP6004BCV-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HIP6004BCV-T?
HIP6004BCV-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HIP6004BCV-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HIP6004BCV-T?
For technical support, including HIP6004BCV-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HIP6004BCV-T requirements.
6.How does Aetrix verify that HIP6004BCV-T is sourced from the original manufacturer or authorized distributors?
All HIP6004BCV-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HIP6004BCV-T meets industry standards.
7.What is the process for return or replacement of HIP6004BCV-T?
All HIP6004BCV-T units undergo pre-shipment inspection (PSI). If there is an issue with HIP6004BCV-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HIP6004BCV-T part is unused and in its original packaging.
Return procedure for HIP6004BCV-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
HIP6004BCV-T Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

