Renesas HIP6004DCBZ-T
- Part No.:
- HIP6004DCBZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
HIP6004DCBZ-T.pdf
- Description:
- IC REG CTRLR AMD 1OUT 20SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
HIP6004DCBZ-T from Intersil is a synchronous-rectified buck PWM controller with integrated voltage-mode regulation, 5-bit VID DAC, and MOSFET rDS(ON)-based overcurrent sensing. It delivers precise 1.10–1.85V output (±1% regulation), supports 50kHz–1MHz programmable switching frequency, and drives two N-channel MOSFETs for microprocessor core power supplies.
For engineers reviewing the HIP6004DCBZ-T datasheet, HIP6004DCBZ-T pinout, HIP6004DCBZ-T application, or HIP6004DCBZ-T equivalent, this page provides verified functional role, confirmed SOIC-20 pin mapping, real-world transient response metrics, validated protection thresholds, and documented alternative options for high-current DC-DC converter design.
Technical Context
The HIP6004DCBZ-T implements voltage-mode PWM control using a 15MHz gain-bandwidth error amplifier and 6V/µs slew rate to achieve fast transient response. Its 200kHz free-running oscillator is adjustable via external RT resistor, enabling stable operation from 50kHz to >1MHz.
It integrates a TTL-compatible 5-bit DAC (VID0–VID4) that sets both output voltage and PGOOD/OVP thresholds, while overcurrent protection uses the upper MOSFET's rDS(ON)-eliminating external sense resistors-and triggers hiccup-mode soft-start recovery.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage Range | 1.100V to 1.850V in 25mV binary steps via VID inputs; enables discrete CPU core voltage selection |
| Voltage Regulation Accuracy | ±1% over line and temperature; ensures stable microprocessor VDD under dynamic load and thermal drift |
| Switching Frequency Range | 50kHz to >1MHz via RT resistor; allows optimization of size vs. efficiency for 12V input systems |
| Error Amplifier GBW | 15MHz gain-bandwidth product; supports high-loop bandwidth for sub-µs transient recovery |
| Overvoltage Threshold | 115% to 120% of DACOUT; triggers OVP pin to drive external SCR for input crowbar protection |
| Power-Good Window | ±10% of DACOUT with 2% hysteresis; prevents PGOOD oscillation during normal output ripple |
| Gate Drive Capability | UGATE: 350–500mA source / LGATE: 300–450mA source; sufficient for driving 10nC gate charge at 1MHz |
Pinout & Package
Package: 20-lead SOIC (M20.3), RoHS-compliant Pb-free plus anneal finish, JEDEC standard footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSEN (1) | Output voltage feedback input | Connects directly to converter output; used by PGOOD and OVP comparators for monitoring |
| OCSET (2) | Overcurrent threshold programming | Internal 200µA current source + external ROCSET sets IPEAK trip point using Q1 rDS(ON) |
| SS (3) | Soft-start timing node | 10µA internal current charges external CSS capacitor; controls ramp-up time and fault recovery |
| VID0–VID4 (4–8) | DAC digital inputs | TTL-compatible 5-bit bus selecting DACOUT voltage; defines output setpoint and protection thresholds |
| COMP (9) | Error amplifier output | Drives external compensation network; interfaces with FB to close voltage-mode control loop |
| FB (10) | Error amplifier inverting input | Connected to VSEN through divider; completes feedback path for regulation accuracy |
| GND (11) | Signal ground reference | Reference for all analog and logic signals; must be low-impedance connection to minimize noise |
| PGOOD (12) | Open-collector status output | Pulled low when VSEN outside ±10% DACOUT; high during disable ('11111' VID) or valid regulation |
| PHASE (13) | High-side switch source monitor | Connects to upper MOSFET source; provides return path for UGATE and enables rDS(ON) sensing |
| UGATE (14) | Upper MOSFET gate driver | Provides high-current source/sink to drive N-channel Q1 gate; requires bootstrap bias via BOOT |
| BOOT (15) | Bootstrap supply input | Accepts floating voltage to bias UGATE above PHASE; enables standard N-MOSFET use in high-side position |
| PGND (16) | Power ground return | Low-inductance tie point for lower MOSFET source and bulk capacitors; separates power and signal grounds |
| LGATE (17) | Lower MOSFET gate driver | Drives synchronous rectifier Q2 gate directly from VCC rail; no bootstrap required |
| VCC (18) | Bias supply input | Accepts +12V ±10%; powers internal circuitry and LGATE driver; requires local decoupling |
| OVP (19) | Overvoltage fault output | Active-high open-drain output triggering external SCR crowbar on >115% DACOUT condition |
| RT (20) | Oscillator frequency adjust | Resistor-to-GND increases frequency; resistor-to-VCC decreases frequency per documented equations |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 5-bit VID DAC | Enables 32 discrete output voltages (1.10–1.85V) without external DAC or resistor network |
| rDS(ON)-based overcurrent sensing | Eliminates current-sense resistor, reducing BOM cost, board area, and conduction losses |
| Hiccup-mode overcurrent recovery | Disables PWM, discharges SS capacitor, then reinitiates soft-start-limits fault energy and thermal stress |
| Programmable 50kHz–1MHz oscillator | Allows trade-off between magnetic component size (higher fSW) and conduction loss (lower fSW) |
| ±10% PGOOD window with hysteresis | Ensures reliable system power sequencing and avoids false toggling due to output ripple |
Applications
| Microprocessor Core Power Supply | High-Current Distributed DC-DC Regulator |
|---|---|
Use Scenario: Delivering tightly regulated 1.3V/15A to AMD K7™ CPU under rapid load transients up to 1A/ns. IC Role / Device Role / Timing Role: Primary PWM controller managing synchronous buck topology, setting VID voltage, and enforcing PGOOD sequencing. Use Value: ±1% regulation and 15MHz error amplifier enable sub-10µs recovery from 50% load steps-meeting K7™ VRM spec. | Use Scenario: Generating 1.5V/20A for FPGA fabric rails in telecom baseband cards with strict ripple limits (<15mVpp). IC Role / Device Role / Timing Role: Voltage-mode controller coordinating dual-phase operation (with companion IC), regulating output via DACOUT reference. Use Value: Programmable 200kHz–1MHz switching allows optimal inductor sizing for EMI compliance and thermal management at 20A. |
| Low-Voltage Server Memory Rail | Industrial Embedded Processor Supply |
Use Scenario: Providing 1.2V/12A to DDR2 memory subsystem with tight hold-up time and brown-out immunity. IC Role / Device Role / Timing Role: Buck controller with integrated OVP/OC protection, monitoring VSEN and asserting PGOOD only within ±10% window. Use Value: Built-in 115% OVP threshold and SCR-driven crowbar prevent memory corruption during input surge events. | Use Scenario: Powering ARM-based industrial controller (1.1V/8A) operating continuously at 70°C ambient. IC Role / Device Role / Timing Role: Single-chip solution integrating DAC, error amp, gate drivers, and protection-reducing component count and layout complexity. Use Value: ±1% regulation over 0–70°C and Pb-free SOIC package ensure long-term reliability in unventilated enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6522CBZ-T | Same manufacturer, pin-compatible SOIC-20; adds adaptive voltage positioning (AVP) and enhanced thermal shutdown | Targeted at newer Pentium 4-era VRMs requiring AVP; lacks '11111' VID disable mode | Select ISL6522CBZ-T if AVP support and tighter thermal protection are required for post-2003 CPU platforms |
| TPS51116PWR | Texas Instruments part; 28-pin TSSOP; integrates MOSFET drivers with 1.5A peak drive and dedicated BOOT diode | Designed for notebook GPU/core supplies; includes VREF tracking and phase interleaving support | Choose TPS51116PWR for space-constrained portable designs needing higher gate drive and multi-phase capability |
Compared with ISL6522CBZ-T and TPS51116PWR, the HIP6004DCBZ-T offers simpler VID-based voltage selection without AVP complexity, lower gate drive current suited for discrete MOSFETs, and proven compatibility with K7™-class microprocessors-making it optimal for legacy server and embedded board designs where minimal BOM and deterministic behavior are prioritized.
Availability
HIP6004DCBZ-T is available at Aetrix Electronics and suitable for microprocessor core power supplies, high-current distributed DC-DC regulators, and low-voltage server memory rails requiring stable component supply and long-lifecycle support.
Supply support for HIP6004DCBZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation (now part of Renesas Electronics) is a U.S.-based semiconductor company specializing in precision analog and power management ICs for computing, industrial, and communications markets.
The HIP6004D product line was designed specifically for high-efficiency, high-transient-response synchronous buck converters powering x86 and K7™ microprocessors-emphasizing integration, thermal robustness, and VID-based voltage scalability.
FAQ
What is the function of the OCSET pin on the HIP6004DCBZ-T?
The OCSET pin on the HIP6004DCBZ-T connects to an external resistor (ROCSET) and the drain of the upper MOSFET to implement rDS(ON)-based overcurrent protection. An internal 200µA current source develops a voltage across ROCSET, and when the voltage drop across the upper MOSFET exceeds that value, the HIP6004DCBZ-T initiates hiccup-mode soft-start recovery. This eliminates the need for a discrete current-sense resistor and reduces power loss.
Does the HIP6004DCBZ-T support both +5V and +12V bias supplies?
The HIP6004DCBZ-T is specified to operate from a +12V ±10% VCC supply. While the datasheet notes "Operates from +5V or +12V Input" in features, the Recommended Operating Conditions table explicitly lists VCC = +12V ±10%, and Absolute Maximum Ratings define VCC ≤ +15V. The +5V input reference applies to the main converter input (VIN), not the IC bias rail. Therefore, HIP6004DCBZ-T requires +12V on VCC (Pin 18) for proper operation.
How does the HIP6004DCBZ-T generate its Power-Good signal?
The HIP6004DCBZ-T generates the PGOOD signal using an internal window comparator that monitors VSEN against DACOUT. PGOOD asserts high when VSEN is within ±10% of DACOUT, with 2% hysteresis to prevent oscillation due to output ripple. During the '11111' VID combination, PGOOD remains high even though the controller is disabled-enabling AND-gating of multiple PGOOD signals in dual-CPU systems. The output is open-collector, requiring an external pull-up resistor.
Can the HIP6004DCBZ-T be used with QFN packages?
No-the HIP6004DCBZ-T is the SOIC-20 variant with Pb-free finish ('Z') and tape-and-reel packaging ('-T'). The QFN-20 version is designated HIP6004DCRZ-T. Although both share identical electrical functionality and pinout numbering, the physical package, thermal characteristics (θJA = 65°C/W for SOIC vs. 33°C/W for QFN), and PCB land pattern differ. Substituting HIP6004DCBZ-T for HIP6004DCRZ-T requires board redesign and is not mechanically compatible.
What is the purpose of the '11111' VID configuration on the HIP6004DCBZ-T?
The '11111' VID configuration (all VID0–VID4 pulled high) disables the HIP6004DCBZ-T gate drivers and forces 0V output, activating Power-On Reset behavior. Uniquely, PGOOD asserts high in this state-unlike normal operation where PGOOD is low during fault or disable. This allows safe AND-ing of PGOOD signals from two HIP6004DCBZ-T controllers in dual-microprocessor systems, ensuring system power-good only when both supplies are valid or both are intentionally held off.
HIP6004DCBZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, AMD-K7™
- Voltage - Input:
- 5V, 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 1.1V ~ 1.85V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SOIC
HIP6004DCBZ-T FAQ
1.How can I place an order for HIP6004DCBZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for HIP6004DCBZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HIP6004DCBZ-T reliable?
The price and inventory of HIP6004DCBZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HIP6004DCBZ-T is usually 5 days.
3.What payment methods are accepted for HIP6004DCBZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HIP6004DCBZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HIP6004DCBZ-T?
HIP6004DCBZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HIP6004DCBZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HIP6004DCBZ-T?
For technical support, including HIP6004DCBZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HIP6004DCBZ-T requirements.
6.How does Aetrix verify that HIP6004DCBZ-T is sourced from the original manufacturer or authorized distributors?
All HIP6004DCBZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HIP6004DCBZ-T meets industry standards.
7.What is the process for return or replacement of HIP6004DCBZ-T?
All HIP6004DCBZ-T units undergo pre-shipment inspection (PSI). If there is an issue with HIP6004DCBZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HIP6004DCBZ-T part is unused and in its original packaging.
Return procedure for HIP6004DCBZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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