Renesas HIP6019BCB
- Part No.:
- HIP6019BCB
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
HIP6019BCB.pdf
- Description:
- IC REG QUAD BUCK/LNR SYNC 28SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,063
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Product details
Overview
HIP6019BCB from Intersil is an advanced dual PWM and dual linear power control IC for microprocessor motherboard power regulation. It integrates two voltage-mode PWM controllers (for core and I/O rails), one linear regulator (2.5V @ 230mA), and one linear controller (1.5V @ external N-MOSFET), all in a single 28-lead SOIC package. Key confirmed parameters: ±1% core output regulation, 200kHz free-running oscillator (50–1000kHz programmable), 5-bit TTL DAC (1.3–3.5V core voltage selection), and MOSFET rDS(ON)-based over-current sensing.
For engineers reviewing the HIP6019BCB datasheet, HIP6019BCB pinout, HIP6019BCB application, or HIP6019BCB equivalent, this page delivers verified technical context, exact pin functions, real-world motherboard use cases, and validated alternative options - all grounded in the FN4587 Rev 1.00 datasheet and Intersil's official specifications.
Technical Context
The HIP6019BCB implements voltage-mode PWM control with high-bandwidth error amplifiers (15MHz GBWP, 6V/µs slew rate) and full 0–100% duty-cycle capability. Its dual PWM architecture uses synchronous rectification for the core rail (VOUT1) and standard buck topology for the I/O rail (VOUT2), while the linear regulator (VOUT4) and linear controller (VOUT3) operate independently with soft-start–clamped reference inputs.
Protection logic integrates four independent monitoring paths: VSEN1/VSEN2-based over-voltage detection (115% DACOUT for VOUT1, 4.3V for VOUT2), rDS(ON)-based over-current sensing via OCSET1/OCSET2 current sources (200µA typ), and FB3/FB4 under-voltage latching with 6% hysteresis. Fault response cycles soft-start three times before latching FAULT/RT to VCC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Output Regulation | ±1% over temperature - ensures stable microprocessor core voltage under thermal stress |
| I/O Output Regulation | ±2% over temperature - supports tight 3.0–3.5V tolerance for computer I/O bus compliance |
| Linear Regulator Output | 2.5V ±2.5% @ 10–150mA - powers clock driver circuits with integrated pass device |
| Linear Controller Output | 1.5V ±2.5% via external N-MOSFET - supplies GTL bus with adjustable feedback (FB3) |
| DAC Core Voltage Range | 1.3V–3.5V in 0.05V (1.3–2.05V) or 0.1V (2.1–3.5V) steps - enables precise VID-programmed CPU core scaling |
| Oscillator Frequency | 200kHz nominal, programmable 50–1000kHz via RT resistor - balances efficiency vs. size in motherboard layout |
| Power Good Logic | Single open-collector PGOOD asserts only when VOUT1 is within ±10% of DAC setting AND all other rails exceed UV thresholds - simplifies system power sequencing |
Pinout & Package
Package: 28-lead SOIC (M28.3), RoHS-compliant, operating ambient temperature range 0°C to 70°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSEN1 (22) | PWM1 output voltage sense | Feeds core rail OVP (115% DACOUT) and PGOOD comparator; sets trip point for shorted upper MOSFET protection |
| VID0–VID4 (3–7) | 5-bit DAC input | TTL-compatible digital interface selecting core voltage (1.3–3.5V); '11111' disables IC and floats PGOOD |
| UGATE1 (27), UGATE2 (1) | Upper MOSFET gate drivers | 1A source / 1.7Ω sink capability drives Q1/Q3 gates directly; eliminates need for external level shifters |
| LGATE1 (25) | Synchronous rectifier gate driver | Drives lower MOSFET (Q2) in core buck stage; enables high-efficiency synchronous rectification |
| GATE3 (18) | Linear controller gate output | Drives external N-MOSFET for GTL bus (VOUT3); referenced to PHASE2 for accurate current sensing |
| FB3 (19), FB4 (14) | Linear feedback inputs | Resistor-divider inputs setting 1.5V (FB3) and 2.5V (FB4) outputs; internal 1.265V reference shared across both |
| FAULT/RT (13) | Oscillator frequency adjust & fault reporting | RT-to-GND sets frequency; pulled to VCC during OV/OC fault - provides single-pin system-level fault signaling |
Key Features
| Feature | Design Value |
|---|---|
| Four-rail integration | Eliminates need for separate controllers for CPU core, I/O, clock, and GTL bus - reduces BOM count and PCB area on ATX motherboards |
| rDS(ON)-based current sensing | Removes discrete current-sense resistors from high-current paths - improves efficiency and thermal performance in 5V/12V input systems |
| Programmable soft-start | 11µA SS current source + external capacitor controls ramp rate - prevents inrush current damage during cold boot or hot-plug events |
| Single-Pin fault reporting | FAULT/RT pin doubles as oscillator tuning node and fault flag - simplifies system monitoring without dedicated fault lines |
| VID-compatible DAC | Direct interface to Intel CPU VID protocols - enables dynamic core voltage adjustment without firmware intervention |
Applications
| Desktop Motherboard Power | Low-Voltage Distributed PSU |
|---|---|
|
Use Scenario: Full ATX motherboard supplying Intel Pentium III/IV-era CPU core (VOUT1), I/O (VOUT2), clock chip (VOUT4), and GTL+ bus (VOUT3). IC Role / Device Role / Timing Role: Central power management IC coordinating four independent regulated rails with synchronized soft-start and unified PGOOD assertion. Use Value: Enables single-chip solution for legacy desktop platforms requiring 1.3–3.5V core scaling, 3.3V I/O, 2.5V clock, and 1.5V GTL - reducing design complexity and component count. |
Use Scenario: Compact embedded system requiring isolated low-noise 2.5V for timing circuits and 1.5V for bus termination, powered from 5V/12V inputs. IC Role / Device Role / Timing Role: Dual linear regulator + dual PWM controller delivering tightly regulated, sequenced outputs with built-in UV/OV/OC protection. Use Value: Provides guaranteed ±2.5% regulation on linear outputs and ±1%/±2% on PWM rails - critical for stable clock generation and signal integrity in distributed power architectures. |
| Microprocessor Reference Design | Legacy Industrial Control Board |
|
Use Scenario: Evaluation platform for CPU voltage scaling validation using programmable VID codes and real-time PGOOD monitoring. IC Role / Device Role / Timing Role: Programmable core voltage source with 0.05V DAC resolution and fast transient response (high-bandwidth error amps). Use Value: Supports precise core voltage margining tests across temperature - essential for validating CPU stability at process corners and aging conditions. |
Use Scenario: Retrofit power upgrade for industrial PLC backplane requiring reliable 3.3V I/O and 2.5V clock supply from existing 5V/12V rails. IC Role / Device Role / Timing Role: Drop-in replacement for aging multi-IC power solutions, leveraging integrated protection and single-point fault reporting. Use Value: Delivers field-proven reliability with 125°C junction rating and latch-off fault handling - extends service life in uncooled control cabinet environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| HIP6018BCB | Single PWM + dual linear configuration; lacks second PWM channel and VID DAC - no core voltage programmability | Supports only fixed-core or externally controlled core rail; suitable for non-CPU applications like peripheral power | Select when only one adjustable PWM rail is required and VID interface is unnecessary |
| ISL6522CBZ | Single 3-phase CPU core controller with integrated MOSFET drivers; no I/O, linear regulator, or GTL controller functions | Optimized exclusively for high-current CPU core delivery; requires separate ICs for I/O, clock, and bus rails | Select for modern high-power CPUs where phase interleaving and higher current capability (>30A) are mandatory |
Compared with HIP6019BCB, HIP6018BCB sacrifices core voltage programmability and dual PWM flexibility for reduced complexity, while ISL6522CBZ trades multi-rail integration for superior CPU core current delivery and phase control - making HIP6019BCB uniquely suited for complete legacy motherboard power consolidation.
Availability
HIP6019BCB is available at Aetrix Electronics and suitable for desktop motherboard design, low-voltage distributed power supplies, microprocessor reference platforms, and legacy industrial control board upgrades requiring stable component supply and long-term lifecycle support.
Supply support for HIP6019BCB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation (now part of Renesas Electronics) is a U.S.-based analog and power management IC designer known for high-performance DC-DC controllers and precision voltage references.
The HIP6019B product line was engineered specifically for full motherboard power regulation in Intel-compatible PC platforms, integrating core, I/O, clock, and GTL bus power control into one SOIC package to simplify layout and improve system-level reliability.
FAQ
What is the core voltage range supported by the HIP6019BCB DAC?
The HIP6019BCB DAC supports a core voltage range from 1.3VDC to 3.5VDC, with 0.05V steps between 1.3V and 2.05V, and 0.1V steps from 2.1V to 3.5V. This range is defined by the five VID pins (VID0–VID4) and enables precise microprocessor core voltage selection per Intel VID protocols. The HIP6019BCB datasheet (FN4587 Rev 1.00, Table 1) confirms all 32 combinations, including INHIBIT mode for shutdown.
Does the HIP6019BCB require external current-sense resistors for over-current protection?
No, the HIP6019BCB does not require external current-sense resistors. It uses the upper MOSFET's rDS(ON) and internal 200µA current sources (OCSET1/OCSET2) to detect over-current conditions. The equation IPEAK = (IOCSET × ROCSET) / rDS(ON) defines the trip point, eliminating power loss and board space associated with shunt resistors. This method is explicitly documented in the HIP6019BCB datasheet Section "Over-Current Protection".
What is the function of the FAULT/RT pin on the HIP6019BCB?
The FAULT/RT pin on the HIP6019BCB serves dual functions: it sets the oscillator switching frequency via an external RT resistor to GND (or VCC), and reports system faults by pulling to VCC during over-voltage or over-current events. During normal operation, its voltage is ~1.26V; during fault, it rises to near VCC to signal latch-up. This dual-role design reduces pin count and simplifies system-level fault monitoring - a key feature confirmed in the HIP6019BCB block diagram and functional description.
Can the HIP6019BCB regulate both synchronous and standard buck topologies simultaneously?
Yes, the HIP6019BCB simultaneously regulates a synchronous-rectified buck converter (for VOUT1/core rail using UGATE1/LGATE1) and a standard buck converter (for VOUT2/I/O rail using UGATE2 only). The first PWM channel drives both high-side and low-side MOSFETs, while the second uses only high-side drive with an external Schottky diode or optional low-side FET. This mixed-topology capability is explicitly stated in the HIP6019BCB datasheet introduction and Figure 3 schematic.
What is the maximum load current supported by the HIP6019BCB's integrated linear regulator?
The HIP6019BCB's integrated linear regulator (VOUT4) supports up to 230mA continuous output current, with regulation specified as 2.5V ±2.5% across 10mA to 150mA. The datasheet notes "230mA" as the over-current protection threshold, confirming safe operation up to that limit. This rail is intended for low-power clock driver circuits, not high-current loads - a design constraint clearly defined in the Electrical Specifications table on page 4 of the HIP6019BCB datasheet.
HIP6019BCB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 215kHz
- Voltage/Current - Output 1:
- Controller
- Voltage/Current - Output 2:
- Controller
- Voltage/Current - Output 3:
- Controller
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 5V ~ 12V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
HIP6019BCB FAQ
1.How can I place an order for HIP6019BCB through Aetrix?
Please submit a Request for Quotation (RFQ) for HIP6019BCB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HIP6019BCB reliable?
The price and inventory of HIP6019BCB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HIP6019BCB is usually 5 days.
3.What payment methods are accepted for HIP6019BCB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HIP6019BCB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HIP6019BCB?
HIP6019BCB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HIP6019BCB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HIP6019BCB?
For technical support, including HIP6019BCB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HIP6019BCB requirements.
6.How does Aetrix verify that HIP6019BCB is sourced from the original manufacturer or authorized distributors?
All HIP6019BCB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HIP6019BCB meets industry standards.
7.What is the process for return or replacement of HIP6019BCB?
All HIP6019BCB units undergo pre-shipment inspection (PSI). If there is an issue with HIP6019BCB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HIP6019BCB part is unused and in its original packaging.
Return procedure for HIP6019BCB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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