Analog Devices Inc. HMC1032LP6GETR
- Part No.:
- HMC1032LP6GETR
- Manufacturer:
- Analog Devices Inc.
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
HMC1032LP6GETR.pdf
- Description:
- IC CLOCK GEN 1:1 350MHZ 40-SMT
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
HMC1032LP6GETR from Analog Devices (formerly Hittite Microwave) is a low-noise clock generator IC with integrated fractional-N PLL and VCO, delivering differential output frequencies from 125 MHz to 350 MHz. It achieves 75 fs RMS jitter (typical at 350 MHz), -165 dBc/Hz phase noise floor, and supports up to 100 MHz phase detector rate-enabling high-integrity clocking for 10G Ethernet line cards and SERDES PHY interfaces.
For engineers reviewing the HMC1032LP6GETR datasheet, HMC1032LP6GETR pinout, HMC1032LP6GETR application, or HMC1032LP6GETR equivalent, key selection criteria include its 24-bit frequency resolution (3 Hz step), Exact Frequency Mode for near-zero output error, built-in digital self-test, and 40-lead 6×6 mm QFN package with exposed ground paddle for RF integrity.
Technical Context
The HMC1032LP6GETR implements a fractional-N PLL architecture with a Delta-Sigma modulator and integrated VCO, enabling wide loop bandwidths up to 250 kHz while maintaining spectral purity. Its charge pump operates at 0.02–2.54 mA with 20 µA step size, and the PD supports integer mode up to 125 MHz and fractional mode up to 100 MHz.
Differential RF outputs (RF_P/RF_N) feature 2-bit amplitude control (four gain settings), mute capability, and 47.5–52.5% duty cycle across 155.52/312.5/350 MHz. The device uses separate 3.3 V and 5 V supply domains-including dedicated VCO core (VCC2), charge pump (VPPCP), and reference (RVDD) rails-to isolate noise-sensitive blocks.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Frequency Range | 125–350 MHz differential; covers OTU2 (167.33 MHz), 10GE WAN (155.52 MHz), XAUI (156.25 MHz), and 16GFC (212.5 MHz) reference clocks. |
| RMS Phase Jitter | 75 fs (typical at 350 MHz, 12 kHz–20 MHz integration, 50 MHz ref, fractional mode); enables <1e-12 BER in high-speed serial links. |
| Phase Noise Floor | <-165 dBc/Hz; ensures minimal contribution to system-level jitter in cascaded clock trees and SERDES CDR loops. |
| Fractional Resolution | 24-bit step size (3 Hz typical); supports exact generation of non-integer multiples like 155.52 MHz and 167.33 MHz without residual spurs. |
| Max Phase Detector Rate | 100 MHz (fractional mode B); allows tight loop bandwidths for fast jitter attenuation in SyncE and OTN applications. |
| Figure of Merit (FOM) | -227 dBc/Hz (fractional mode); industry-leading efficiency metric confirming low power-per-jitter performance. |
| Supply Voltages | 3.3 V (AVDD, RVDD, DVDD3V, etc.) and 5 V (VPPCP, VCC1, VCC2); dual-rail design prevents digital switching noise from corrupting analog VCO/PLL sections. |
Pinout & Package
40-lead, 6×6 mm QFN package (RoHS-compliant, MSL1, matte tin finish) with exposed ground paddle requiring solder connection to PCB RF ground plane per Hittite Application Note land pattern guidance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RF_P / RF_N | Differential clock outputs | AC-coupled LVPECL-compatible outputs; amplitude programmable via SPI (4 gain settings), mute-enabled. |
| XREFP | Reference oscillator input | AC-coupled 50 Ω input accepting 1–3.3 Vp-p square/sine; supports 14–100 MHz crystals or external clocks. |
| CP | Charge pump output | High-impedance current source driving external loop filter; requires precise R/C network per Figure 9 design table. |
| VTUNE | VCO tuning port | Analog voltage input (0.3–2.7 V) controlling VCO frequency; sensitive to noise-requires local RC filtering and guard ring. |
| SEN / SDI / SCK / LD_SDO | SPI interface | CMOS 4-wire serial port for register configuration, lock detection, and GPO functionality; operates at DVDD3V level. |
| VCC2 / VCC1 / VPPCP / RVDD / AVDD / DVDD3V | Power supplies | Isolated analog/digital rails: VCC2 powers VCO core (105 mA @ fo/1), VPPCP powers charge pump (8 mA), RVDD supplies reference stage. |
Key Features
| Feature | Design Value |
|---|---|
| Exact Frequency Mode | Delta-Sigma modulator enables sub-Hz frequency accuracy-critical for OTN/SONET timing compliance without external trimming. |
| Built-in Digital Self Test | On-chip diagnostics verify PLL lock, VCO calibration, and register integrity-reducing test time and field failure root-cause analysis. |
| Differential Output Amplitude Control | 2-bit SPI-selectable gain (00–11) adjusts swing from 330 mVpp to 1.01 Vpp @ 350 MHz-optimizing signal integrity into 50 Ω loads or FPGA clock inputs. |
| Low-Floor Phase Noise | <-165 dBc/Hz noise floor minimizes jitter accumulation in multi-stage clock distribution-essential for 10G+ optical transponders. |
| Industry Compliance | Exceeds GR-253-CORE and G.8251 jitter requirements-validated for carrier-grade synchronous Ethernet and OTN transport systems. |
Applications
| 10G Ethernet Line Cards | OTN/SONET Transport Systems |
|---|---|
Use Scenario: Generating reference clocks for 10GE WAN PHY and OTU2 line interfaces on telecom line cards. IC Role / Device Role / Timing Role: Primary clock generator providing 155.52 MHz and 167.33 MHz outputs with sub-100 fs jitter to meet ITU-T G.8251 mask. Use Value: Enables deterministic bit-error-rate performance in long-haul fiber links by suppressing accumulated jitter from upstream recovery circuits. |
Use Scenario: Jitter attenuation and frequency translation of recovered line clocks in OTN multiplexers. IC Role / Device Role / Timing Role: Clean-up PLL re-timing recovered 155.52 MHz or 167.33 MHz signals using narrow-loop bandwidth and ultra-low phase noise VCO. Use Value: Reduces wander and jitter beyond ITU-T G.8262 limits-ensuring compliant synchronization across multi-node optical networks. |
| FPGA & High-Speed ADC Clocking | Optical Transponder LO Generation |
Use Scenario: Providing low-jitter sampling clocks for 14-bit, 500 MSPS ADCs and high-bandwidth FPGA transceivers. IC Role / Device Role / Timing Role: Master clock source with 75 fs RMS jitter and 47.5–52.5% duty cycle-minimizing aperture uncertainty and setup/hold violations. Use Value: Improves effective number of bits (ENOB) in data converters and extends eye opening in 28 Gbps SerDes lanes. |
Use Scenario: Local oscillator synthesis for 10G/25G coherent optical modules requiring stable 350 MHz or 312.5 MHz carriers. IC Role / Device Role / Timing Role: Integrated VCO-based LO generator eliminating discrete oscillator + multiplier chains and reducing board area. Use Value: Lowers phase noise-induced EVM degradation in DP-QPSK modulation while simplifying thermal management. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMK04828BISQE/NOPB | Two-stage jitter cleaner with dual-loop architecture; higher power (320 mW vs 290 mW), supports JESD204B SYSREF. | Better suited for multi-device deterministic latency alignment; lacks integrated VCO-requires external 100–350 MHz source. | Select when deterministic delay control and multi-chip sync are required over single-chip simplicity. |
| Si5341-B-GM | Multi-output clock generator with 12 outputs, DCO-based fractional synthesis; lower jitter (50 fs) but limited to 3.2 GHz max output. | Targets complex systems needing multiple synchronized clocks (e.g., CPU, memory, I/O); no native 155.52/167.33 MHz exact-mode support. | Select when >1 output or sub-50 fs jitter is mandatory; accept added complexity and cost for flexibility. |
Compared with LMK04828BISQE/NOPB and Si5341-B-GM, the HMC1032LP6GETR delivers superior single-output jitter performance in a compact 6×6 mm footprint with true exact-frequency synthesis-making it optimal for space-constrained, high-performance telecom clocking where one clean output suffices.
Availability
HMC1032LP6GETR is available at Aetrix Electronics and suitable for 10G Ethernet line cards, OTN transport equipment, and high-speed data converter clocking requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for HMC1032LP6GETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Hittite Microwave in 2014 and integrates its high-frequency RF and microwave expertise into precision timing and signal chain solutions.
The HMC1032LP6GETR belongs to Hittite's clock generator product line, designed specifically for carrier-grade telecom infrastructure demanding ultra-low jitter, GR-253/G.8251 compliance, and integrated VCO simplicity.
FAQ
What is the maximum phase detector frequency supported by the HMC1032LP6GETR in fractional-N mode?
The HMC1032LP6GETR supports a maximum phase detector frequency of 100 MHz in Fractional Mode B. This requires respecting the minimum N-divider value (e.g., PFD rate = fVCO/20 or 100 MHz, whichever is less). At 350 MHz output, the minimum N is 3.5, satisfying this constraint. The HMC1032LP6GETR datasheet specifies this limit under "PD Frequency Fractional Mode B" in Electrical Specifications Table 3.
Does the HMC1032LP6GETR require an external loop filter, and what are the critical design considerations?
Yes, the HMC1032LP6GETR requires an external passive loop filter connected between CP and VTUNE pins. Critical design considerations include matching the filter's pole/zero locations to the target loop bandwidth (e.g., 250 kHz for jitter attenuation), using low-ESR capacitors and precision resistors, and shielding VTUNE from digital noise. The HMC1032LP6GETR Loop Filter Configuration Table (Figure 9) provides validated R/C values for 135 kHz, 150 kHz, and 250 kHz bandwidths.
How does the Exact Frequency Mode in the HMC1032LP6GETR improve timing accuracy compared to standard fractional-N synthesizers?
Exact Frequency Mode uses Hittite's enhanced Delta-Sigma modulator to eliminate residual fractional spurs and reduce long-term frequency error to near 0 Hz-enabling precise generation of standards-based rates like 155.52 MHz and 167.33 MHz without post-fabrication calibration. Unlike generic fractional-N ICs that exhibit ppm-level drift, the HMC1032LP6GETR maintains sub-0.1 ppm accuracy across temperature and voltage, directly supporting ITU-T G.8262 compliance.
Can the HMC1032LP6GETR generate single-ended outputs, and what is the recommended termination?
Yes, the HMC1032LP6GETR can operate in single-ended mode by disabling RF_N and using RF_P only. The datasheet specifies single-ended output swing as 0.25–1.35 Vpp into 50 Ω. AC coupling is mandatory; a 0.1 µF series capacitor followed by 50 Ω to ground is recommended. For best jitter performance, maintain controlled 50 Ω impedance and minimize stub length-verified in HMC1032LP6GETR Evaluation PCB layout guidelines.
What power supply sequencing is required for reliable startup of the HMC1032LP6GETR?
No strict power supply sequencing is mandated, but Analog Devices recommends ramping 3.3 V supplies (AVDD, RVDD, DVDD3V) before 5 V supplies (VPPCP, VCC1, VCC2) to ensure digital logic initializes prior to analog block activation. The HMC1032LP6GETR incorporates internal power-on reset with 250 µs delay and triggers reset if DVDD drops below 1.5 V. Full functionality is guaranteed once all supplies settle within ±5% of nominal values across -40°C to +85°C.
HMC1032LP6GETR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- Yes
- Input:
- Clock
- Output:
- Clock
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:2
- Differential - Input:Output:
- No/Yes
- Frequency - Max:
- 350MHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 3V ~ 5.2V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 40-SMT (6x6)
HMC1032LP6GETR FAQ
1.How can I place an order for HMC1032LP6GETR through Aetrix?
Please submit a Request for Quotation (RFQ) for HMC1032LP6GETR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HMC1032LP6GETR reliable?
The price and inventory of HMC1032LP6GETR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HMC1032LP6GETR is usually 5 days.
3.What payment methods are accepted for HMC1032LP6GETR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HMC1032LP6GETR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HMC1032LP6GETR?
HMC1032LP6GETR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HMC1032LP6GETR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HMC1032LP6GETR?
For technical support, including HMC1032LP6GETR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HMC1032LP6GETR requirements.
6.How does Aetrix verify that HMC1032LP6GETR is sourced from the original manufacturer or authorized distributors?
All HMC1032LP6GETR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HMC1032LP6GETR meets industry standards.
7.What is the process for return or replacement of HMC1032LP6GETR?
All HMC1032LP6GETR units undergo pre-shipment inspection (PSI). If there is an issue with HMC1032LP6GETR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HMC1032LP6GETR part is unused and in its original packaging.
Return procedure for HMC1032LP6GETR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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